Field configurable system-on-chip device architecture

被引:10
|
作者
Knapp, S [1 ]
Tavana, D [1 ]
机构
[1] Triscend Corp, Mt View, CA 94043 USA
关键词
D O I
10.1109/CICC.2000.852639
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Time to market pressures, increasing system complexity, and smaller process geometries, are creating a market vacuum that will be increasingly addressed by an important emerging category of devices: the Configurable System-on-Chip (CsoC). These application specific programmable parts (ASPP) are single chip combinations of microprocessors, memory, dedicated peripheral functions, and embedded programmable logic. They provide unprecedented time-to-market benefits and field customization for the electronic systems of this upcoming decade. Integration of microprocessors, memory, peripherals, and programmable logic is made possible with a new bus architecture called the Configurable System Interconnect Bus (CSI). The Configurable System Interconnect Bus was specifically designed to facilitate re-use, guarantee timing, increase system throughput, and reduce system debug time in applications that require intense time-to-market and field upgrade. [GRAPHICS]
引用
收藏
页码:155 / 158
页数:4
相关论文
共 50 条
  • [1] A configurable system-on-chip architecture for embedded devices
    Wallner, S
    ADVANCES IN COMPUTER SYSTEMS ARCHITECTURE, PROCEEDINGS, 2004, 3189 : 58 - 71
  • [2] Design methodology of a configurable system-on-chip architecture
    Wallner, S
    12TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS, 2004, : 283 - 284
  • [3] A configurable system-on-chip architecture with descriptors for dynamic reconfiguration
    Wallner, S
    ESA'04 & VLSI'04, PROCEEDINGS, 2004, : 157 - 163
  • [4] Configurable and flexible System-on-Chip design
    Hu, Hua
    Wang, Luke
    Xing, Jianguo
    DCABES 2006 PROCEEDINGS, VOLS 1 AND 2, 2006, : 1214 - 1218
  • [5] Design of a configurable system-on-chip for audio application
    Tan, Honghe
    Sun, Yihe
    ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 740 - 743
  • [6] Configurable processors and the evolution of system-on-chip design
    Maydan, DE
    ERSA'05: PROCEEDINGS OF THE 2005 INTERNATIONAL CONFERENCE ON ENGINEERING OF RECONFIGURABLE SYSTEMS AND ALGORITHMS, 2005, : 37 - 37
  • [7] Extensible and configurable processors for system-on-chip design
    Nurmi, Jari
    Leibson, Steve
    Campi, Fabio
    Panis, Christian
    ADVANCED SIGNAL PROCESSING, CIRCUITS, AND SYSTEM DESIGN TECHNIQUES FOR COMMUNICATIONS, 2006, : 45 - +
  • [8] FLEXBUS: A high-performance system-on-chip communication architecture with a dynamically configurable topology
    Sekar, K
    Lahiri, K
    Raghunathan, A
    Dey, S
    42ND DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2005, 2005, : 571 - 574
  • [9] ACMA: Accuracy-Configurable Multiplier Architecture for Error-Resilient System-on-Chip
    Bhardwaj, Kartikeya
    Mane, Pravin S.
    2013 8TH INTERNATIONAL WORKSHOP ON RECONFIGURABLE AND COMMUNICATION-CENTRIC SYSTEMS-ON-CHIP (RECOSOC), 2013,
  • [10] Architecture, memory and interface technology integration of an industrial/academic configurable system-on-chip (CSoC)
    Becker, J
    Vorbach, M
    ISVLSI 2003: IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: NEW TRENDS AND TECHNOLOGIES FOR VLSI SYSTEMS DESIGN, 2003, : 107 - 112