Investigating Copper Wire Bonding Technology in Chip-on-Board Applications

被引：0
|
作者：
Krammer, Oliver [1 ]
Roka, Peter [1 ]
Jakab, Laszlo [1 ]
机构：
[1] Budapest Univ Technol & Econ, Dept Elect Technol, Budapest, Hungary
来源：
2013 PROCEEDINGS OF THE 36TH INTERNATIONAL SPRING SEMINAR ON ELECTRONICS TECHNOLOGY (ISSE) | 2013年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In our experiment, the possibility of forming copper wire bonds in Chip-on-Board (COB) applications was investigated. In the experiment, such surface finishes were studied and compared which are common in printed circuit board based COB applications and can be bonded with wire bonding technologies. These finishes were immersion silver (ImAg), electroless nickel / immersion gold (ENIG) and electroless nickel / electroless palladium / immersion gold (ENEPIG). On each type of surface finish, copper wires with two diameters (33 and 300 mu m) were bonded with a TPT Ultrasonic bonder. The wire bonds then characterized by optical inspections and mechanical measurements which are detailed in the paper.
引用
收藏
页码：94 / 98
页数：5
相关论文
共 50 条
  • [31] ACTIVE COOLING METHOD FOR CHIP-ON-BOARD LEDS
    Badalan , Niculina
    Svasta, Paul
    Marghescu, Cristina
    UNIVERSITY POLITEHNICA OF BUCHAREST SCIENTIFIC BULLETIN SERIES C-ELECTRICAL ENGINEERING AND COMPUTER SCIENCE, 2018, 80 (02): : 97 - 108
  • [32] Manufacture of printed circuit boards with aluminium bonded surfaces for chip-on-board applications
    Bonck, H.
    Galvanotechnik, 1997, 88 (12): : 4150 - 4153
  • [33] CONSIDERATIONS FOR CHOOSING CHIP-ON-BOARD ENCAPSULANTS.
    Burkhart, Art
    Bonneau, Mark
    Electri-onics, 1985, 31 (10): : 67 - 69
  • [34] Degradation of bondcontacts in chip-on-board microelectronic assemblies
    Paul, M
    Berek, H
    Kaden, G
    Schneider, W
    MATERIALS AND CORROSION-WERKSTOFFE UND KORROSION, 1997, 48 (03): : 171 - 175
  • [35] CHIP-ON-BOARD: AN ECONOMICAL PACKAGING SOLUTION.
    Fuchs, Edward
    Electronic Packaging and Production, 1985, 25 (01): : 182 - 185
  • [36] Bare Copper and Palladium Coated Copper Wire Chip to Chip Bonding Feasibility Study
    Ho, Ong Chen
    Ying, Lee Chai
    Se, Gan Pei
    PROCEEDINGS OF THE 2013 IEEE 15TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC 2013), 2013, : 183 - 188
  • [37] Thermal analysis of a wirebond chip-on-board package
    Pang, JHL
    Tan, CK
    ITHERM '98: SIXTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS, 1998, : 481 - 487
  • [38] Development of a cleaning process for chip-on-board manufacture
    Gruebel, H.
    Galvanotechnik, 1996, 87 (07):
  • [39] DEVELOPMENT OF COPPER WIRE BONDING APPLICATION TECHNOLOGY
    TOYOZAWA, K
    FUJITA, K
    MINAMIDE, S
    MAEDA, T
    IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1990, 13 (04): : 667 - 672
  • [40] Challenges and developments of copper wire bonding technology
    Liu, Peisheng
    Tong, Liangyu
    Wang, Jinlan
    Shi, Lei
    Tang, Hao
    MICROELECTRONICS RELIABILITY, 2012, 52 (06) : 1092 - 1098
12345