Gate Voltage Contribution to Neutron-Induced SEB of Trench Gate Fieldstop IGBT

被引:11
|
作者
Foro, L. L. [1 ]
Touboul, A. D. [1 ]
Michez, A. [1 ]
Wrobel, F. [1 ]
Rech, P. [2 ]
Dilillo, L. [3 ]
Frost, C. [4 ]
Saigne, F. [1 ]
机构
[1] Univ Montpellier 2, CNRS UM2, IES UMR 5214, F-34095 Montpellier 5, France
[2] Univ Fed Rio Grande do Sul, BR-91501970 Porto Alegre, RS, Brazil
[3] Univ Montpellier 2, CNRS UM2, LIRMM UMR 5506, F-34095 Montpellier 5, France
[4] Rutherford Appleton Lab, ISIS, Sci & Technol Facil Council, Didcot OX11 0QX, Oxon, England
关键词
Atmospheric neutrons; cross section; gate oxide breakdown; insulated gate bipolar transistor (IGBT); Single Event Burnout (SEB); Single Event Gate Rupture (SEGR); trench gate fieldstop; SINGLE-EVENT BURNOUT; POWER MOSFETS; RUPTURE; SEGR; MECHANISM; MODEL;
D O I
10.1109/TNS.2014.2332813
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Single Event Burnout and Gate Rupture are catastrophic failures due to cosmic rays that can occur simultaneously. It is shown that negatively biasing the gate leads to a substantial increase of SEB cross section in particular when the collector voltage is closer to the safe operating area of the device.
引用
收藏
页码:1739 / 1746
页数:8
相关论文
共 50 条
  • [21] Impact of the anode current of an IGBT on the gate voltage
    Bock, B
    Steimel, A
    PESC 04: 2004 IEEE 35TH ANNUAL POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-6, CONFERENCE PROCEEDINGS, 2004, : 2930 - 2936
  • [22] Numerical Analysis of Impact of Shield Gate on Trench IGBT and CSTBT
    Zhang, Jinping
    Wang, Kang
    Luo, Junyi
    Zhao, Yang
    Li, Zehong
    Ren, Min
    Gao, Wei
    Zhang, Bo
    2019 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2019,
  • [23] Trench gate GaN IGBT with controlled hole injection efficiency
    Yi H.
    Yueyue L.
    Sheng G.
    Qi W.
    Bin L.
    Genquan H.
    Journal of China Universities of Posts and Telecommunications, 2024, 31 (02): : 10 - 16
  • [24] Short-circuit protection for an IGBT with detecting the gate voltage and gate charge
    Hasegawa, K.
    Yamamoto, K.
    Yoshida, H.
    Hamada, K.
    Tsukuda, M.
    Omura, I.
    MICROELECTRONICS RELIABILITY, 2014, 54 (9-10) : 1897 - 1900
  • [25] Gate-level mitigation techniques for neutron-induced soft error rate
    Deogun, HS
    Sylvester, D
    Blaauw, D
    6th International Symposium on Quality Electronic Design, Proceedings, 2005, : 175 - 180
  • [26] High Performance SEB Hardened Trench Power MOSFFT with Partially Widened Split Gate and Trench Source
    Lu, Jiang
    Liu, Jiawei
    Tian, Xiaoli
    Chen, Hong
    Liang, Fei
    Bai, Yun
    2019 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2019,
  • [27] IGBT Power Module Design for Suppressing Gate Voltage Spike at Digital Gate Control
    Lou, Zaiqi
    Mamee, Thatree
    Hata, Katsuhiro
    Takamiya, Makoto
    Nishizawa, Shin-Ichi
    Saito, Wataru
    IEEE ACCESS, 2023, 11 : 6632 - 6640
  • [28] An improved trench gate super-junction IGBT with double emitter
    Dai Weinan
    Zhu Jing
    Sun Weifeng
    Du Yicheng
    Huang Keqin
    JOURNAL OF SEMICONDUCTORS, 2015, 36 (01)
  • [29] Mechanism of gate voltage spike under digital gate control at IGBT switching operations
    Lou Z.
    Mamee T.
    Hata K.
    Takamiya M.
    Nishizawa S.-I.
    Saito W.
    Power Electronic Devices and Components, 2024, 7
  • [30] An improved trench gate super-junction IGBT with double emitter
    戴伟楠
    祝靖
    孙伟锋
    杜益成
    黄克琴
    JournalofSemiconductors, 2015, 36 (01) : 99 - 104