Performance evaluation of reconfigurable ALU based on DG-CNTFET transistors

被引:0
|
作者
Ghabri, Houda [1 ]
ben Aissa, Dalenda [1 ]
Samet, Hekmet [1 ]
Kachouri, Abdennaceur [1 ]
机构
[1] Univ Sfax, Natl Sch Engn Sfax, LETI Lab, BP 3038, Sfax, Tunisia
关键词
component; gate CNTFET; DG-CNTFET modeling; reconfigurable logic design; reconfigurable ALU; Comparison CMOS LUT; Power; delay;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Arithmetic and Logic Unit represent the core of all microprocessors. It performs arithmetic and logical operations. ALU is getting more complex and smaller to make more efficient circuits. This paper describes simple ALU but contains the essentials functions. It is a reconfigurable ALU based on double gate carbon nanotube field effect transistors (DG-CNTFETs).The proposed ALU is designed for one bit operation and can realize three functions (NAND,OR and FULL ADDER). We will demonstrate the benefit of designing a reconfigurable ALU using a compact physical model of DG-CNTFET transistor. First, an explanation of controllable polarity transistor is given. Then a dynamically reconfigurable circuit and 3-function ALU based on a (DG-CNTFET) are described, simulated and analyzed. Finally an overall performance comparison in term of average Power Consumption and delay with CMOS LUT is done. Results shows that this 3-functions ALU have PDP, power and delay better than all 1-bit CMOS full adders, 44% reduction in the consumption and 12% enhancement in delay time.
引用
收藏
页码:142 / 146
页数:5
相关论文
共 50 条
  • [41] Performance evaluation of multipliers in reconfigurable hardware
    Wijesinghe, W. A. S.
    Jayananda, M. K.
    Sonnadara, D. U. J.
    JOURNAL OF THE NATIONAL SCIENCE FOUNDATION OF SRI LANKA, 2008, 36 (03): : 235 - 237
  • [42] Reconfigurable Processor LSI Based on ALU Array with Limitations of Connections of ALUs for Software Radio
    Ozone, Makoto
    Hiramatsu, Tatsuo
    Hirase, Katsunori
    Iizuka, Kazuhisa
    PROCEEDINGS OF THE 2009 SIXTH INTERNATIONAL CONFERENCE ON INFORMATION TECHNOLOGY: NEW GENERATIONS, VOLS 1-3, 2009, : 837 - 842
  • [43] Performance evaluation of electro-optic effect based graphene transistors
    Gupta, Gaurav
    Jalil, Mansoor Bin Abdul
    Yu, Bin
    Liang, Gengchiau
    NANOSCALE, 2012, 4 (20) : 6365 - 6373
  • [44] Stress-Dependent Performance Optimization of Reconfigurable Silicon Nanowire Transistors
    Baldauf, Tim
    Heinzig, Andre
    Trommer, Jens
    Mikolajick, Thomas
    Weber, Walter Michael
    IEEE ELECTRON DEVICE LETTERS, 2015, 36 (10) : 991 - 993
  • [45] Performance Evaluation of a New Hybrid Islanding Detection Method for a Wind Based DG System
    Krishnan, Geethi
    Gaonkar, D. N.
    2013 IEEE CONFERENCE ON CLEAN ENERGY AND TECHNOLOGY (CEAT), 2013, : 411 - 415
  • [46] Techniques to Improve the Performance in the CNTFET-Based Analogue Circuit Design
    Marani, R.
    Perri, A. G.
    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, 2020, 9 (03)
  • [47] High-Frequency Performance Study of CNTFET-Based Amplifiers
    Ramos-Silva, Javier N.
    Pacheco-Sanchez, Anibal
    Diaz-Albarran, Luis M.
    Rodriguez-Mendez, Luis M.
    Enciso-Aguilar, Mauro A.
    Schroter, Michael
    Ramirez-Garcia, Eloy
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2020, 19 : 284 - 291
  • [48] Performance evaluation of single-ended disturb-free CNTFET-based multi-Vt SRAM
    Patel, Pramod Kumar
    Malik, M. M.
    Gupta, Tarun K.
    MICROELECTRONICS JOURNAL, 2019, 90 : 19 - 28
  • [49] Performance Evaluation of DG in Distribution System: An Extensive Review
    Chauhan, Gaurav
    Bangia, Sakshi
    INTERNATIONAL TRANSACTION JOURNAL OF ENGINEERING MANAGEMENT & APPLIED SCIENCES & TECHNOLOGIES, 2021, 12 (02):
  • [50] An evaluation of performance parameters of reconfigurable SAR systems
    Younis, M
    Fischer, C
    Wiesbeck, W
    IGARSS 2002: IEEE INTERNATIONAL GEOSCIENCE AND REMOTE SENSING SYMPOSIUM AND 24TH CANADIAN SYMPOSIUM ON REMOTE SENSING, VOLS I-VI, PROCEEDINGS: REMOTE SENSING: INTEGRATING OUR VIEW OF THE PLANET, 2002, : 677 - 679