Embedded Erase Failure in NOR Flash EEPROM Memory

被引：0
|
作者：
Lim, Bryan [1 ]
Wong, Vivien [1 ]
Gooi, L. C. [1 ]
Lee, Cecilia [1 ]
Francis, Caroline [1 ]
Lee, K. Y. [1 ]
机构：
[1] Freescale Semicond, Petaling Jaya 47300, Selangor, Malaysia
来源：
2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4 | 2008年
关键词：
D O I：
10.1109/ICSICT.2008.4734664
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents the evaluation methods and findings of the hot temperature embedded erase failure on an embedded NOR flash EEPROM device. Automated Test Equipment (ATE) and bench evaluation revealed that the embedded erase failure was caused by compaction failure with high compaction pulse counts. Failure localization using memory bitmapping showed that the fail bitcells were populated at the edge of the flash array. Based on detailed electrical characterization and physical analysis, compaction failure was determined to be due to poor hot carrier injection (HCI) efficiency as a result of possible shallow trench isolation (STI) over-polish.
引用
收藏
页码：843 / 845
页数：3
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