Self-aligned multi-level air gap integration

被引:5
|
作者
Hoofman, R. J. O. M.
Caluwaerts, R.
Michelon, J.
Bernabe, P. Herrero
de Mussy, J. P. Gueneau
Bruynseraede, C.
Lee, J. M.
List, S.
Bancken, P. H. L.
Beyer, G.
机构
[1] Philips Res Leuven, B-3001 Louvain, Belgium
[2] IMEC, B-3001 Louvain, Belgium
[3] Univ Valladolid, Dept Elect, E-47011 Valladolid, Spain
[4] IMEC, B-3001 Louvain, Belgium
关键词
self-aligned air gaps; plasma damaged SiOC; capacitance reduction; dielectric reliability; via reliability;
D O I
10.1016/j.mee.2006.09.025
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Dual damascene self-aligned air gap structures have been fabricated through selective removal of interline plasma-damaged SiOC material using dilute HF solutions after metal CMP. The extent of the gaps was shown to be tuneable. The creation of interline air gaps through removal of damaged dielectric yielded significant capacitance reduction plus in addition dielectric reliability improvement. The via-reliability of 2 metal-build air gap structures was tested by thermal cycling and constant thermal stress. No significant difference in via reliability was observed between SiOC interconnects with and without air gaps. However, failure analysis showed weak spots near the bottom of the barrier, which could be detrimental for dual damascene reliability. These weak spots at the barrier bottom could lead to catastrophic failures in both via and lines during electromigration stressing. Moreover, process-related issues such as bottom liner undercut and copper corrosion need to be controlled more stringent before this air gap approach can be successfully implemented. (c) 2006 Elsevier B.V. All rights reserved.
引用
收藏
页码:2150 / 2154
页数:5
相关论文
共 50 条
  • [31] Structural design of Cu multi-level interconnects with air-gap by finite element method
    Usui, Takamasa
    Murofushi, Tadashi
    Jimbo, Masakazu
    Hirayama, Hiroshi
    Shibata, Hideki
    ADVANCED METALLIZATION CONFERENCE 2007 (AMC 2007), 2008, 23 : 279 - 284
  • [32] Air-Spacer MOSFET With Self-Aligned Contact for Future Dense Memories
    Park, Jemin
    Hu, Chenming
    IEEE ELECTRON DEVICE LETTERS, 2009, 30 (12) : 1368 - 1370
  • [33] Air-Spacer Self-Aligned Contact MOSFET for Future Dense Memories
    Park, Jemin
    Hu, Chemning
    SISPAD: 2008 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 2008, : 313 - 316
  • [34] Gate Last MOSFET with Air Spacer and Self-Aligned Contacts for Dense Memories
    Park, Jemin
    Hu, Chenming
    PROCEEDINGS OF TECHNICAL PROGRAM: 2009 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS, 2009, : 105 - 106
  • [35] Self-Aligned Coupled Nanowire Transistor
    Kulmala, Tero S.
    Colli, Alan
    Fasoli, Andrea
    Lombardo, Antonio
    Haque, Samiul
    Ferrari, Andrea C.
    ACS NANO, 2011, 5 (09) : 6910 - 6915
  • [36] Self-aligned contacting of carbon nanotubes
    Liebau, M
    Unger, E
    Graham, AP
    Duesberg, GS
    Kreupl, F
    Seidel, R
    Hoenlein, W
    MOLECULAR NANOSTRUCTURES, 2003, 685 : 533 - 536
  • [37] Self-Aligned Nanoscale SQUID on a Tip
    Finkler, Amit
    Segev, Yehonathan
    Myasoedov, Yuri
    Rappaport, Michael L.
    Ne'ernan, Lior
    Vasyukov, Denis
    Zeldov, Eli
    Huber, Martin E.
    Miartin, Jens
    Yacoby, Amir
    NANO LETTERS, 2010, 10 (03) : 1046 - 1049
  • [38] SUBMICROMETER SELF-ALIGNED GAAS MESFET
    BAUDET, P
    BINET, M
    BOCCONGIBOD, D
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1976, 24 (06) : 372 - 376
  • [39] Fabrication of self-aligned multilevel nanostructures
    Joseph, Praveen
    Singhal, Shrawan
    Abed, Ovadia
    Sreenivasan, S. V.
    MICROELECTRONIC ENGINEERING, 2017, 169 : 49 - 61
  • [40] Self-aligned SiGe HBTs with doping level inversion using selective epitaxy
    Ito, S
    Nakamura, T
    Hoga, H
    Nishikawa, S
    Fujimaki, H
    Hijikata, Y
    Okita, Y
    IEICE TRANSACTIONS ON ELECTRONICS, 1999, E82C (03) : 526 - 530