A 50-Gbit/s 1:4 demultiplexer IC in InP-based HEMT technology

被引：14
|
作者：
Kano, H [1 ]
Suzuki, T [1 ]
Yamaura, S [1 ]
Nakasha, Y [1 ]
Sawada, K [1 ]
Takahashi, T [1 ]
Makiyama, K [1 ]
Hirose, T [1 ]
Watanabe, Y [1 ]
机构：
[1] Fujitsu Labs Ltd, Atsugi, Kanagawa 2430197, Japan
来源：
2002 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS 1-3 | 2002年
关键词：
D O I：
10.1109/MWSYM.2002.1011562
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We have developed a 50-Gb/s 1:4 demultiplexer (DEMUX) integrated circuit with a wide phase margin of 108 degrees in 0.13-mum InP-based HEMT technology. To increase the phase margin, we designed the data and clock distribution with the aim of achieving high symmetry and eliminating multiple reflections. The measured performance of the fabricated 1:4 DEMUX was suitable for practical use in 50-Gbit/s-class applications.
引用
收藏
页码：75 / 78
页数：4
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