Impedance of Power Distribution Networks in TSV-based 3D-ICs

被引:0
|
作者
Kim, Kiyeong [1 ]
Pak, Jun So [1 ]
Kim, Heegon [1 ]
Lee, Junho [2 ]
Park, Kunwoo [2 ]
Kim, Joungho [1 ]
机构
[1] Korea Adv Inst Sci & Technol, Dept Elect Engn, Daejeon, South Korea
[2] Hynix Semicond Inc, Adv Design Team, Icheon, Kyoungki Do, South Korea
关键词
MODEL; SILICON;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
To estimate the simultaneous switching noise (SSN) on the three dimensional VDDQ power distribution network (3D VDDQ PDN) in a TSV-based GPU system, the PDN impedance (ZPDN) and the pull up impedance (Zpull-up) of the VDDQ PDN in the GPU system were first estimated and analyzed. The GPU system consisted of a GPU, quadruple-stacked DRAMs, a silicon interposer and an organic package. The impedance estimation method, based on a segmentation method and a balancedtransmission line method (Balanced-TLM), was used for the estimation of the PDN impedance and the pull-up impedance of the 3D VDDQ PDN, combining the models of the chip PDNs, S/G lines, P/G TSV pairs, and a package PDN. The PDN impedance and the pull up impedance were also analysed with respect to the variation in the number of the P/G TSV.
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页数:4
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