Impedance of Power Distribution Networks in TSV-based 3D-ICs

被引:0
|
作者
Kim, Kiyeong [1 ]
Pak, Jun So [1 ]
Kim, Heegon [1 ]
Lee, Junho [2 ]
Park, Kunwoo [2 ]
Kim, Joungho [1 ]
机构
[1] Korea Adv Inst Sci & Technol, Dept Elect Engn, Daejeon, South Korea
[2] Hynix Semicond Inc, Adv Design Team, Icheon, Kyoungki Do, South Korea
关键词
MODEL; SILICON;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
To estimate the simultaneous switching noise (SSN) on the three dimensional VDDQ power distribution network (3D VDDQ PDN) in a TSV-based GPU system, the PDN impedance (ZPDN) and the pull up impedance (Zpull-up) of the VDDQ PDN in the GPU system were first estimated and analyzed. The GPU system consisted of a GPU, quadruple-stacked DRAMs, a silicon interposer and an organic package. The impedance estimation method, based on a segmentation method and a balancedtransmission line method (Balanced-TLM), was used for the estimation of the PDN impedance and the pull-up impedance of the 3D VDDQ PDN, combining the models of the chip PDNs, S/G lines, P/G TSV pairs, and a package PDN. The PDN impedance and the pull up impedance were also analysed with respect to the variation in the number of the P/G TSV.
引用
收藏
页数:4
相关论文
共 50 条
  • [1] Effects of On-Chip Decoupling Capacitors and Silicon Substrate on Power Distribution Networks in TSV-based 3D-ICs
    Kim, Kiyeong
    Pak, Jun So
    Lee, Hyungdong
    Kim, Joungho
    [J]. 2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 690 - 697
  • [2] DfT Techniques and Architectures for TSV-Based 3D-ICs: A Comparative Study
    Salah, Khaled
    [J]. PROCEEDINGS OF THE 18TH MEDITERRANEAN ELECTROTECHNICAL CONFERENCE MELECON 2016, 2016,
  • [3] Decoupling Capacitor Stacked Chip (DCSC) in TSV-based 3D-ICs
    Song, Eunseok
    Koo, Kyoungchoul
    Kim, Myunghoi
    Pak, Jun So
    Kim, Joungho
    [J]. 2011 IEEE 20TH CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS), 2011, : 235 - 238
  • [4] ELECTRICAL-THERMAL-RELIABILITY CO-DESIGN FOR TSV-BASED 3D-ICS
    Lu, Tiantao
    Srivastava, Ankur
    [J]. INTERNATIONAL TECHNICAL CONFERENCE AND EXHIBITION ON PACKAGING AND INTEGRATION OF ELECTRONIC AND PHOTONIC MICROSYSTEMS, 2015, VOL 1, 2015,
  • [5] Power, Performance, and Cost Comparisons of Monolithic 3D ICs and TSV-based 3D ICs
    Nayak, Deepak Kumar
    Banna, Srinivasa
    Samal, Sandeep Kumar
    Lim, Sung Kyu
    [J]. 2015 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2015,
  • [6] Decoupling Capacitor Topologies for TSV-Based 3-D ICs With Power Gating
    Wang, Hailang
    Salman, Emre
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2015, 23 (12) : 2983 - 2991
  • [7] Power Delivery Network Design for Wiring and TSV Resource Minimization in TSV-Based 3-D ICs
    Wei, Shu-Han
    Lee, Yu-Min
    Ho, Chia-Tung
    Sun, Chih-Ting
    Cheng, Liang-Chia
    [J]. 2013 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), 2013,
  • [8] Power Delivery Network Design for Wiring and TSV Resource Minimization in TSV-Based 3-D ICs
    Wei, Shu-Han
    Lee, Yu-Min
    Ho, Chia-Tung
    Sun, Chih-Ting
    Cheng, Liang-Chia
    [J]. 2013 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), 2013,
  • [9] TSV-Based 3-D ICs: Design Methods and Tools
    Lu, Tiantao
    Serafy, Caleb
    Yang, Zhiyuan
    Samal, Sandeep Kumar
    Lim, Sung Kyu
    Srivastava, Ankur
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2017, 36 (10) : 1593 - 1619
  • [10] Design for Manufacturability and Reliability for TSV-based 3D ICs
    Pan, David Z.
    Lim, Sung Kyu
    Athikulwongse, Krit
    Jung, Moongon
    Mitra, Joydeep
    Pak, Jiwoo
    Pathak, Mohit
    Yang, Jae-Seok
    [J]. 2012 17TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2012, : 750 - 755