A fault-tolerant and congestion-aware architecture for wireless networks-on-chip

被引:6
|
作者
Mortazavi, Seyed Hassan [1 ]
Akbar, Reza [1 ]
Safaei, Farshad [1 ]
Rezaei, Amin [2 ]
机构
[1] Shahid Beheshti Univ, Fac Comp Sci & Engn, Tehran 1983963113, Iran
[2] NU, Dept Elect Engn & Comp Sci, Evanston, IL USA
关键词
Network-on-chip; Hybrid wireless network-on-chip; Many-core system-on-chip; Reliability; Robustness; Congestion control management; NOC; DESIGN;
D O I
10.1007/s11276-019-01962-3
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The combination of traditional wired links for regular transmissions and express wireless paths for long distance communications is a promising solution to prevent multi-hop network delays. In wireless network-on-chip technology, wireless-equipped routers are more error-prone than the conventional ones not only because of their implementation complexities but also due to their relatively high utilization. In this paper, a new topology is presented to enhance the network reliability, and then a novel routing algorithm is proposed to tolerate both intermittent and permanent faults on wireless hubs. In the proposed approach, once a wireless hub becomes faulty, the best alternative adjustment hub will be indicated and all the packets that have high average hop-count are routed through this alternative hub. In comparison with the state-of-the-art works, the proposed approach shows significant improvements in terms of robustness, congestion management, and resilience.
引用
收藏
页码:3675 / 3687
页数:13
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