Statistical modeling of MOS devices for parametric yield prediction

被引：5
|
作者：
Liou, JJ [1 ]
Zhang, Q
McMacken, J
Thomson, JR
Stiles, K
Layman, P
机构：
[1] Univ Cent Florida, Sch EE & CS, Dept Elect & Comp Engn, Orlando, FL 32816 USA
[2] Huazhong Univ Sci & Technol, Dept Elect Sci & Technol, Wuhan 430074, Peoples R China
[3] Agere Syst, Modeling & Simulat Gr, Orlando, FL USA
来源：
MICROELECTRONICS RELIABILITY | 2002年 / 42卷 / 4-5期
关键词：
D O I：
10.1016/S0026-2714(01)00262-1
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In the manufacturing of VLSI circuits, engineering designs should take into consideration random variations arising from processing, In this paper, statistical modeling of MOS devices is reviewed, and effective and practical models are developed to predict the performance spread (i.e., parametric yield) of MOS devices and circuits due to the process variations. To illustrate their applications, the models are applied to the 0.25 mum CMOS technology, and measured data are included in support of the model calculations. (C) 2002 Elsevier Science Ltd. All rights reserved.
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页码：787 / 795
页数：9
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