Statistical modeling of MOS devices based on parametric test data for improved IC manufacturing

被引：0
|
作者：
Liou, JJ [1 ]
Zhang, Q [1 ]
McMacken, J [1 ]
Thomson, JR [1 ]
Stiles, K [1 ]
Layman, P [1 ]
机构：
[1] Univ Cent Florida, Sch EE & CS, Orlando, FL 32816 USA
来源：
PROCEEDINGS 2001 IEEE HONG KONG ELECTRON DEVICES MEETING | 2001年
关键词：
D O I：
10.1109/HKEDM.2001.946912
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In the manufacturing of VLSI circuits, engineering designs should take into consideration random variations arising from processing. In this paper, statistical modeling of MOS devices is reviewed, and effective and practical models are developed to predict the performance spread of MOS circuits due to the process variations. To illustrate their applications, the models are applied to the 0.25 mum CMOS technology, and measured data are included in support of the model calculations.
引用
收藏
页码：31 / 37
页数：3
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