共 50 条
- [31] An analytical propagation delay model with power supply noise effects [J]. 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 629 - 632
- [32] Static compaction of delay tests considering power supply noise [J]. 23RD IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2005, : 235 - 240
- [34] SIGNAL DETECTION WITH NOISE POWER VARIATION BETWEEN THE HYPOTHESES [J]. 2009 IEEE 13TH DIGITAL SIGNAL PROCESSING WORKSHOP & 5TH IEEE PROCESSING EDUCATION WORKSHOP, VOLS 1 AND 2, PROCEEDINGS, 2009, : 588 - +
- [35] Bounding supply noise induced path delay variation by a relaxation approach [J]. 19TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2005, : 349 - 354
- [36] Measurement results of delay degradation due to power supply noise well correlated with full-chip simulation [J]. PROCEEDINGS OF THE IEEE 2006 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2006, : 861 - 864
- [37] SOURCES OF VARIATION IN SPIROMETRIC MEASUREMENTS - IDENTIFYING THE SIGNAL AND DEALING WITH NOISE [J]. OCCUPATIONAL MEDICINE-STATE OF THE ART REVIEWS, 1993, 8 (02): : 241 - 264
- [38] Effect of power supply noise on SRAM dynamic stability [J]. 2007 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2007, : 76 - 77
- [39] Coping with buffer delay change due to power and ground noise [J]. 39TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2002, 2002, : 860 - 865
- [40] Power supply noise conversion to phase noise in CMOS frequency digital divider [J]. PROCEEDINGS OF THE 2002 IEEE INTERNATIONAL FREQUENCY CONTROL SYMPOSIUM & PDA EXHIBITION, 2002, : 699 - 702