Low Complexity Synchronization Design of an OFDM Receiver for DVB-T/H

被引：5

作者：

Wei, Ting-Chen ^{[1
]}

Liu, Wei-Chang ^{[1
]}

Tseng, Chi-Yao ^{[2
]}

Jou, Shyh-Jye ^{[1
]}

机构：

[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan

[2] Natl Cent Univ, Dept Elect Engn, Tao Yuan 300, Taiwan

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 2009年 / 55卷 / 02期

关键词：

OFDM; Synchronization; DVB; DIGITAL MODEMS; INTERPOLATION;

D O I：

10.1109/TCE.2009.5174401

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, an OFDM baseband receiver for DVB-T/H is presented. The receiver contains four synchronizations, an OFDM symbol synchronization, a carrier synchronization, a sampling clock synchronization and a scattered pilots synchronization. This paper proposes several novel designs to reduce the synchronization latency and hardware complexity. The carrier and clock synchronization loops are fully digitalized schemes. The scattered pilots synchronization adopts a two stages scheme to reduce the detection latency. In addition, the pre-filling scheme reduces the latency of channel estimation. The design result shows that the equivalent gate count is about 810K gates including 102.8KB memory(1).

引用

页码：408 / 413

页数：6

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