High Throughput LDPC Decoder on GPU

被引:27
|
作者
Lin, Yong [1 ]
Niu, Wensheng [2 ]
机构
[1] Ningxia Normal Univ, Dept Phys & Informat Engn, Guyuan 756000, Peoples R China
[2] Xidian Univ, Sch Comp Sci & Engn, Xian 710071, Peoples R China
关键词
CUDA; decoding; GPU; parallel processing; LDPC code; PARITY-CHECK CODES; SHANNON LIMIT;
D O I
10.1109/LCOMM.2014.010214.132406
中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
The available Lower Density Parity Check (LDPC) decoders on Graphics Processing Unit (GPU) do not simultaneously read and write contiguous data blocks in memory because of the random nature of LDPC codes. One of these two operations has to be performed using noncontiguous accesses, resulting in long access time. To overcome this issue, we designed a multi-codeword parallel decoder with fully coalesced memory access. To test the performance of the method, we applied the method using an 8-bit compact data. The experimental results demonstrated that the method achieved more than 550Mbps throughput on Compute Unified Device Architecture (CUDA) enabled GPU.
引用
收藏
页码:344 / 347
页数:4
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