Understanding the potential and limitations of HfAlO as interpoly dielectric in floating-gate Flash memory

被引:16
|
作者
Govoreanu, B. [1 ]
Degraeve, R. [1 ]
Zahid, M. B. [1 ]
Nyns, L. [1 ]
Cho, M. [1 ]
Kaczer, B. [1 ]
Jurczak, M. [1 ]
Kittl, J. A. [1 ]
Van Houdt, J. [1 ]
机构
[1] IMEC, B-3001 Leuven, Belgium
关键词
HfAlO; High-k materials; Defect density; Interpoly dielectrics; Flash memory; NAND; RELIABILITY;
D O I
10.1016/j.mee.2009.03.099
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Introduction of high-k dielectrics in Flash memory is seen as a must for the upcoming technology nodes. Hafnium aluminate (HfAlO) has been identified as a possible candidate for implementing the interpoly dielectric in floating gate memory. In this work, we establish a link between the material morphology and its electrical response, allowing to understand memory device behavior and to consequently assess the potential and limitations of HfAlO as IPD in a memory cell. (C) 2009 Elsevier B.V. All rights reserved.
引用
收藏
页码:1807 / 1811
页数:5
相关论文
共 50 条
  • [41] Visualization of charges stored in the floating gate of flash memory by scanning nonlinear dielectric microscopy
    Honda, K
    Hashimoto, S
    Cho, Y
    NANOTECHNOLOGY, 2006, 17 (07) : S185 - S188
  • [42] MEMORY PHENOMENA IN NOVEL FLOATING-GATE GAAS/ALGAAS DEVICES
    CAPASSO, F
    BELTRAM, F
    WALKER, JF
    MALIK, RJ
    GALLIUM ARSENIDE AND RELATED COMPOUNDS 1988, 1989, : 493 - 498
  • [43] PROPERTIES OF ELECTRICALLY REPROGRAMMABLE FLOATING-GATE MOS MEMORY ELEMENTS
    BELYAEV, SN
    KOLYASNIKOV, VA
    RAKITIN, VV
    STARIKOVA, TI
    TISHIN, YI
    ENKOVICH, VA
    SOVIET MICROELECTRONICS, 1982, 11 (02): : 95 - 100
  • [44] Nonvolatile memory with a metal nanocrystal/nitride heterogeneous floating-gate
    Lee, C
    Hou, TH
    Kan, ECC
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (12) : 2697 - 2702
  • [45] Voltage source circuit based on CMOS floating-gate memory
    de la Cruz Alejo, Jesus
    Ponce Ponce, Victor
    Gomez Castaneda, Felipe
    Moreno Cadenas, Jose A.
    2007 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING, 2007, : 257 - +
  • [46] Effects of surface smoothness and deposition temperature of floating gates in flash memory devices to oxide/nitride/oxide interpoly dielectric breakdown
    Cha, CL
    Chor, EF
    Gong, H
    Chan, L
    JOURNAL OF MATERIALS SCIENCE LETTERS, 2000, 19 (09) : 817 - 821
  • [47] Vertical floating-gate 4.5F2 split-gate NOR flash memory at 110nm node
    Lee, D
    Tsui, F
    Yang, JW
    Gao, F
    Lu, WJ
    Lee, Y
    Chen, CT
    Huang, V
    Wang, PY
    Liu, MH
    Hsu, HC
    Chang, S
    Chang, SY
    Van Tran, H
    Frayer, J
    Hu, YW
    Yeh, B
    Chen, B
    2004 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2004, : 72 - 73
  • [48] Scaling down the interpoly dielectric for next generation - Flash memory: Challenges and opportunities
    Govoreanu, B
    Brunco, DP
    Van Houdt, J
    SOLID-STATE ELECTRONICS, 2005, 49 (11) : 1841 - 1848
  • [49] A study on the radiation hardness of flash cell with horn-shaped floating-gate
    Huang, TY
    Jong, FC
    Chao, TS
    Lin, HC
    Leu, LY
    Young, K
    Lin, CH
    Chiu, KY
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1997, 36 (9A): : 5459 - 5463
  • [50] Instability study of high-κ Inter-Gate Dielectric stacks on Hybrid Floating Gate flash memory
    Zahid, M. B.
    Degraeve, R.
    Breuil, L.
    Van den Bosch, G.
    Van Houdt, J.
    2013 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2013,