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- [8] Hierarchical test generation for analog circuits using incremental test development 17TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 1999, : 296 - 301
- [10] Automated Test Generation for Debugging Arithmetic Circuits PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2016, : 1351 - 1356