A Reconfigurable Architecture for 1-D and 2-D Discrete Wavelet Transform

被引:5
|
作者
Sun, Qing [1 ]
Jiang, Jiang [1 ]
Zhu, Yongxin [1 ]
Fu, Yuzhuo [1 ]
机构
[1] Shanghai Jiao Tong Univ, Sch Microelect, Shanghai 200030, Peoples R China
关键词
DWT; reconfigurable; FPGA implementation; pipeline architecture; high flexibility; VLSI ARCHITECTURE;
D O I
10.1109/FCCM.2013.23
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we propose a novel architecture for DWT that can be reconfigured to be adapted to different kinds of filter banks and different sizes of inputs. High flexibility and generality are achieved by using the MAC loop based filter(MLBF). Classic methods, such as polyphase structure and fragment-based sample consumption, are used to enhance the parallelism of the system. The architecture can be reconfigured to 3 modes to deal with 1-D or 2-D DWT with different bandwidth and throughput requirements.
引用
收藏
页码:81 / 84
页数:4
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