A unified environment for the modeling of ultra deep submicron MOS transistors

被引:0
|
作者
Gneiting, T [1 ]
机构
[1] Advanced Modeling Solut, AdMOS GmbH, D-72636 Frickenhausen, Germany
来源
关键词
MOSFET; Compact Models; Model Parameter Extraction;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper discusses the aspects of modern MOS modeling requirements. Starting from the fact, that even the Compact Model Council (CMC) outlined BSIM3v3 as a standard MOS simulation model, many other models are used throughout the semiconductor community. Their common approach is they are all highly scalable to cover a wide range of transistor dimensions. To cover this effect, a strategy for efficient model parameter extraction with a special emphasis on scalability is illustrated. This leads to a software architecture and a data base concept, which enables modeling engineers to handle the parameter extraction for different simulation models from one common measurement base in a very efficient and flexible way.
引用
收藏
页码:368 / 371
页数:4
相关论文
共 50 条
  • [41] A simple and unambiguous definition of threshold voltage and its implications in deep-submicron MOS device modeling
    Zhou, X
    Lim, KY
    Lim, D
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1999, 46 (04) : 807 - 809
  • [42] Precise extraction of ultra deep submicron interconnect parasitics with parameterized 3D-Modeling
    Frerichs, MR
    PROCEEDINGS OF THE ASP-DAC 2001: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2001, 2001, : 50 - 55
  • [43] Modeling of TID-induced leakage current in ultra-deep submicron SOI NMOSFETs
    Xi, Shanxue
    Zheng, Qiwen
    Lu, Wu
    Cui, Jiangwei
    Wei, Ying
    Guo, Qi
    MICROELECTRONICS JOURNAL, 2020, 102
  • [44] Unified 3-D mobility model for the simulation of submicron MOS devices
    Yang, Jiuun-Jer
    Chung, Steve Shao-Shiun
    Chang, Chien-Hwa
    Lee, Giahn-Horng
    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, 1993, 32 (04): : 1583 - 1589
  • [45] A UNIFIED 3-D MOBILITY MODEL FOR THE SIMULATION OF SUBMICRON MOS DEVICES
    YANG, JJ
    CHUNG, SSS
    CHANG, CH
    LEE, GH
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1993, 32 (04): : 1583 - 1589
  • [46] Modeling of heterojunction bipolar transistors: A unified approach
    Kumar, KP
    Dasgupta, A
    PHYSICS OF SEMICONDUCTOR DEVICES, VOLS 1 AND 2, 1998, 3316 : 856 - 864
  • [47] Unified deep-submicron MOSFET model for circuit simulation
    Tsinghua Univ, Beijing, China
    International Conference on Solid-State and Integrated Circuit Technology Proceedings, 1998, : 439 - 442
  • [48] Artificial-Neural-Network Prediction of Device Behaviors in Submicron MOS Transistors
    Chen, Shen-Li
    Chen, Ying-Der
    ADVANCES IN CHEMICAL, MATERIAL AND METALLURGICAL ENGINEERING, PTS 1-5, 2013, 634-638 : 2442 - 2445
  • [49] MODELING SUBTHRESHOLD CAPACITANCES OF MOS-TRANSISTORS
    AFZALIKUSHAA, A
    ELNOKALI, M
    SOLID-STATE ELECTRONICS, 1992, 35 (01) : 45 - 49
  • [50] Temperature modeling of threshold voltage of MOS transistors
    Tyagi, MS
    Yadav, KS
    SEMICONDUCTOR DEVICES, 1996, 2733 : 19 - 29