A novel 4H-SiC trench MOSFET with double shielding structures and ultralow gate-drain charge

被引：16

作者：

Luo, Xiaorong ^{[1
]}

Liao, Tian ^{[1
]}

Wei, Jie ^{[1
]}

Fang, Jian ^{[1
]}

Yang, Fei ^{[2
]}

Zhang, Bo ^{[1
]}

机构：

[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Sichuan, Peoples R China

[2] Global Energy Interconnect Res Inst, Beijing 102209, Peoples R China

来源：

JOURNAL OF SEMICONDUCTORS | 2019年 / 40卷 / 05期

关键词：

SiC trench MOSFET; reverse transfer capacitance; gate-drain charge; figure of merit; UMOSFETS;

D O I：

10.1088/1674-4926/40/5/052803

中图分类号：

O469 [凝聚态物理学];

学科分类号：

070205 ;

摘要：

A new ultralow gate-drain charge (Q(GD)) 4H-SiC trench MOSFET is presented and its mechanism is investigated by simulation. The novel MOSFET features double shielding structures (DS-MOS): one is the grounded split gate (SG), the other is the P+ shielding region (PSR). Both the SG and the PSR reduce the coupling effect between the gate and the drain, and transform the most part of the gate-drain capacitance (C-GD) into the gate-source capacitance (CGS) and drain-source capacitance (C-DS) in series. Thus the C-GD is reduced and the proposed DS-MOS obtains ultralow Q(GD). Compared with the double-trench MOSFET (DT-MOS) and the conventional trench MOSFET (CT-MOS), the proposed DS-MOS decreases the Q(GD) by 85% and 81%, respectively. Moreover, the figure of merit (FOM), defined as the product of specific on-resistance (R-on,R- sp) and QGD (R(on, sp)Q(GD)), is reduced by 84% and 81%, respectively.

引用

页数：6

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