Analysis and Design of High Speed/High Linearity Continuous Time Delta-Sigma Modulator

被引：0

作者：

Chu, Chao ^{[1
]}

Brueckner, Timon ^{[1
]}

Kauffman, John G. ^{[1
]}

Anders, Jens ^{[1
]}

Becker, Joachim ^{[1
]}

Ortmanns, Maurits ^{[1
]}

机构：

[1] Univ Ulm, Inst Microelect, D-89069 Ulm, Germany

来源：

2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2013年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper considers the implementation of a continuous-time low-pass single-hit AF, analog-digital converter (ADC) for radar applications. By taking advantage of the high transit frequency of a 0.25pm SiGe BiCMOS technology, the 3rdorder modulator operates at 1.92GHz and achieves 77.8dB SNDR within a bandwidth of 15MHz, when simulating the sensitive circuit parts on transistor level. Thanks to the inherent linearity of single-bit digital-analog converter (DAC), high linearity of 90dB spurious-free dynamic range (SFDR) can be achieved.

引用

页码：1268 / 1271

页数：4

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