Design of Low-Power Bulk-Driven Balanced OTA in 90nm CMOS Technology

被引：0
|
作者：
Jusoh, Wan Mohammad Ehsan Aiman bin Wan [1 ]
Ruslan, Siti Hawa [1 ]
机构：
[1] Univ Tun Hussein Onn Malaysia, Fac Elect & Elect Engn, Batu Pahat, Malaysia
来源：
2018 IEEE STUDENT CONFERENCE ON RESEARCH AND DEVELOPMENT (SCORED) | 2018年
关键词：
Bulk-driven; CMOS technology; Low-power; Operational transconductance amplifier; Weak inversion;
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
This paper proposed a design of balanced/symmetrical operational transconductance amplifier (OTA) in 90nm that adopting bulk-driven technique. The proposed OTA have been designed and simulated carefully using Synopsys HSpice software and the results are analyzed thoroughly. By implementing bulk-driven technique into symmetrical OTA, it produced open loop DC gain of 29.6 dB, CMRR of 51.48 dB and consumed only 4.296 mu W from +/- 0.5 V supply voltage. This low-power characteristic made the designed OTA suitable to be implemented in bio-medical field where it can be used to amplify the bio-potential signals such as electrocardiogram (ECG) signals.
引用
收藏
页数：6
相关论文
共 50 条
  • [41] Adjustably transconductance enhanced bulk-driven OTA with the CMOS technologies scaling
    Wang, Yongqing
    Zhao, Xiao
    Zhang, Qisheng
    Lv, Xiaolong
    [J]. ELECTRONICS LETTERS, 2018, 54 (05) : 276 - 278
  • [42] An enhanced bulk-driven OTA with high transconductance against CMOS scaling
    Wang, Yongqing
    Zhang, Qisheng
    Zhao, Xiao
    Dong, Liyuan
    [J]. AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2021, 130
  • [43] Design and Performance Analysis of Low Frequency CMOS Ring Oscillator Using 90nm Technology
    Ramakrishna, Balaji S.
    Yalpi, Shivananda
    Kumar, Nithin L.
    Ravindra, H. B.
    Ram, Chaina
    [J]. 2016 IEEE INTERNATIONAL CONFERENCE ON RECENT TRENDS IN ELECTRONICS, INFORMATION & COMMUNICATION TECHNOLOGY (RTEICT), 2016, : 1796 - 1801
  • [44] Bulk-driven floating-gate and bulk-driven quasi-floating-gate techniques for low-voltage low-power analog circuits design
    Khateb, Fabian
    [J]. AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2014, 68 (01) : 64 - 72
  • [45] Low-Voltage Low-Power Bulk-Driven and Bulk-Driven-Quasi-floating-Gate Neural Amplifier Design for EEG
    Gupta, Lipika
    Kumar, Amod
    Singh, Sartajvir
    [J]. ADVANCED INFORMATICS FOR COMPUTING RESEARCH, ICAICR 2019, PT II, 2019, 1076 : 45 - 54
  • [46] Design of Low-power 4-bit Flash ADC Using Multiplexer Based Encoder in 90nm CMOS Process
    Sam, D. S. Shylu
    Paul, P. Sam
    Jingle, Diana Jeba
    Paul, P. Mano
    Samuel, Judith
    Reshma, J.
    Sarah, P.
    Evangeline, Sudeepa G.
    [J]. INTERNATIONAL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS, 2022, 68 (03) : 565 - 570
  • [47] Low-voltage low-power bulk-driven analog median filter
    Khateb, Fabian
    Kumngern, Montree
    Dabbous, Salma Bay Abo
    Kulej, Tomasz
    [J]. AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2016, 70 (05) : 698 - 706
  • [48] A Low Power, Area Efficient Limiting Amplifier in 90nm CMOS
    Tavernier, Filip
    Steyaert, Michiel
    [J]. 2009 PROCEEDINGS OF ESSCIRC, 2009, : 129 - 132
  • [49] A Low-Power Injection-Locked Frequency Tripler in 90 nm CMOS Technology
    Lai, Wen-Cheng
    Jang, Sheng-Lyang
    Yeh, Hsiu-An
    Juang, Miin-Horng
    [J]. 2020 THE 5TH IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUITS AND MICROSYSTEMS (ICICM 2020), 2020, : 96 - 100
  • [50] A 0.4 V Bulk-input Pseudo Amplifier in 90nm CMOS Technology
    Ahmadpour, A.
    [J]. PROCEEDINGS OF THE 13TH IEEE SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, 2010, : 301 - 304
12345