Highly manufacturable sub-100nm DRAM integrated with full functionality

被引：4

作者：

Choi, S ^{[1
]}

Nam, BY ^{[1
]}

Ku, JH ^{[1
]}

Kim, DC ^{[1
]}

Lee, SH ^{[1
]}

Lee, JJ ^{[1
]}

Lee, JW ^{[1
]}

Ryu, JD ^{[1
]}

Heo, SJ ^{[1
]}

Cho, JK ^{[1
]}

Yoon, SP ^{[1
]}

Choi, CJ ^{[1
]}

Lee, YJ ^{[1
]}

Chung, JH ^{[1
]}

Kim, BH ^{[1
]}

Lee, MB ^{[1
]}

Choi, GH ^{[1
]}

Kim, YS ^{[1
]}

Fujihara, K ^{[1
]}

Chung, UI ^{[1
]}

Moon, JT ^{[1
]}

机构：

[1] Adv Proc Dev Project, Syst LSI Business, Yongin Si 449900, Kyunggi Do, South Korea

来源：

2002 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2002年

关键词：

D O I：

10.1109/VLSIT.2002.1015385

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Sub-100nm DRAM is successfully fabricated for the first time with several key technologies, including W/WxN-poly gate, bitline structure having low parastic capacitance, Ru/Ta2O5/poly-Si capacitor and advanced CVD-Al contact processes. Fully functional working device is obtained with promising cell performance. Each technology also shows its; extendibility as a manufacturable module process for further scaled DRAM.

引用

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页码：54 / 55

页数：2

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