Suppression of Endurance-stressed Data-retention Failures of 40nm TaOx-based ReRAM

被引：0

作者：

Fukuyama, Shouhei ^{[1
]}

Maeda, Kazuki ^{[1
]}

Matsuda, Shinpei ^{[1
]}

Takeuchi, Ken ^{[1
]}

Yasuhara, Ryutaro ^{[2
]}

机构：

[1] Chuo Univ, Dept Elect Elect & Commun Engn, Tokyo, Japan

[2] Panasonic Semicond Solut Co Ltd, 1 Kotari Yakemachi, Kyoto 6178520, Japan

来源：

2018 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) | 2018年

关键词：

Terms ReRAM; Endurance; Data-Retention;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work investigates data-retention characteristics after different Set/Reset endurance cycles and voltages in 40nm TaOx based resistive random access memory (ReRAM). The reliability of ReRAM cells depends on data-retention time in low resistance state (LRS), while data-retention time of high resistance state (HRS) improves by the proposed novel write method "Finalize". The current distribution of LRS shifts overall to the HRS side as data-retention time increases. Thus, the data-retention characteristics in LRS are determined by typical cells of the major current distribution. These phenomena are different from those of NAND flash memories where tail cells determine the data-retention time. A consistent physical model of both endurance-stress and retention-stress is proposed.

引用

页数：5

共 8 条

[1] Improvement of Endurance and Data-retention in 40nm TaOX-based ReRAM by Finalize Verify
Fukuyama, Shouhei
Matsuda, Shinpei
Yasuhara, Ryutaro
Takeuchi, Ken
[J]. 2018 NON-VOLATILE MEMORY TECHNOLOGY SYMPOSIUM (NVMTS 2018), 2018,
[2] Comprehensive Analysis of Data-retention and Endurance Trade-off of 40nm TaOX-based ReRAM
Fukuyama, Shouhei
Hayakawa, Atsuna
Yasuhara, Ryutaro
Matsuda, Shinpei
Kinoshita, Hiroshi
Takeuchi, Ken
[J]. 2019 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2019,
[3] 85% endurance error reduction and data-retention lifetime enhancement by changing the reset voltage in 40 nm TaOx-based ReRAM
Kinoshita, Hiroshi
Yonai, Tsubasa
Takeuchi, Ken
[J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 2020, 59 (SG)
[4] Error Recovery of Low Resistance State in 40nm TaOx-based ReRAM
Maeda, Kazuki
Fukuyama, Shouhei
Takeuchi, Ken
Yasuhara, Ryutaro
Mishima, Satoshi
[J]. 2017 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2017,
[5] Real-time Error Monitoring System Considering Endurance and Data-retention Characteristics of TaOX-based ReRAM Storage with Workloads at Data Centers
Kakuta, Yoshiki
Kinoshita, Reika
Kinoshita, Hiroshi
Matsui, Chihiro
Takeuchi, Ken
[J]. 2020 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), 2020,
[6] Observation and Analysis of Bit-by-Bit Cell Current Variation During Data-Retention of TaOx-based ReRAM
Maeda, Kazuki
Matsuda, Shinpei
Takeuchi, Ken
Yasuhara, Ryutaro
[J]. 2018 48TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC), 2018, : 46 - 49
[7] Resolving Endurance and Program Time Trade-off of 40nm TaOx-based ReRAM by Co-optimizing Verify Cycles, Reset Voltage and ECC Strength
Hayakawa, Atsuna
Maeda, Kazuki
Fukuyama, Shouhei
Takishita, Hirofumi
Yasuhara, Ryutaro
Mishima, Satoshi
Takeuchi, Ken
[J]. 2017 IEEE 9TH INTERNATIONAL MEMORY WORKSHOP (IMW), 2017, : 24 - 27
[8] Error-Reduction Controller Techniques of TaOx-based ReRAM for Deep Neural Networks to Extend Data-Retention Lifetime by Over 1700x
Deguchi, Yoshiaki
Maeda, Kazuki
Suzuki, Shun
Nakamura, Toshiki
Takeuchi, Ken
[J]. 2018 IEEE 10TH INTERNATIONAL MEMORY WORKSHOP (IMW), 2018, : 157 - 160

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