Development of design rule checker for mask generation of semiconductor devices

A CAD tool for generation of masks of integrated devices was developed using the language AutoLisp. The software AutoCAD that provides a built in Lisp interpreter was used to develop the software Layout Editor. It was essential to verify the output of the layout editor on the basis of the design rules of the foundry. This paper discusses a few salient features of the software developed for the same. It also produces a list out of the errors, which can then be modified before sending the final design to the foundry.