Megasonic cleaning tool seeks a clean sweep at 65nm and below

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  • [1] Enhanced model based OPC for 65nm and below
    Word, J
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    [J]. 24TH ANNUAL BACUS SYMPOSIUM ON PHOTOMASK TECHNOLOGY, PT 1 AND 2, 2004, 5567 : 1305 - 1314
  • [2] Enhanced model based OPC for 65nm and below
    Word, J
    Cobb, NB
    [J]. EMLC 2005: 21st European Mask and Lithography Conference, 2005, 5835 : XXI - XXX
  • [3] A new category of particles at 65nm technology and below
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    Neuber, Andreas
    [J]. 2006 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE AND WORKSHOP, 2006, : 380 - 382
  • [4] An integrated solution for photomask manufacturing, handling and storage at 65nm and below
    Schwitzgebel, Jorg
    Xiao, Guangming
    Rockwell, Barry
    Nozaki, Sammy
    Darvish, Ali
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  • [5] Challenges in gate level modeling for delay and SI at 65nm and below
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    Kariat, Vinod
    [J]. 2008 45TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2, 2008, : 468 - 473
  • [6] Progressive ArF exposure tool for the 65nm node lithography
    Irie, N
    Hamatani, M
    Nei, M
    [J]. Optical Microlithography XVIII, Pts 1-3, 2005, 5754 : 725 - 733
  • [7] Chemical dry cleaning technology for reliable 65nm CMOS contact to NiSix
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    Tsutsumi, K
    Harakawa, H
    Nomachi, A
    Murakami, K
    Ooya, K
    Kudou, T
    Nagamatsu, T
    Ezawa, H
    [J]. PROCEEDINGS OF THE IEEE 2005 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2005, : 194 - 196
  • [8] Performance Enhanced Op-Amp for 65nm CMOS Technologies and Below
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  • [9] Advanced surface cleaning strategy for 65nm CMOS device performance enhancement
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    Bernard, H
    Beverina, A
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    Duriez, B
    Barla, K
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    [J]. ULTRA CLEAN PROCESSING OF SILICON SURFACES VII, 2005, 103-104 : 37 - 40
  • [10] 300 mm megasonic cleaning process to address material consumption requirements for sub-65nm
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    [J]. 2005 IEEE Workshop on Microelectronics and Electron Devices, 2005, : 21 - 23