3DIC from Concept to Reality

被引：0

作者：

Lee, Frank ^{[1
]}

Shen, Bill ^{[1
]}

Chen, Willy ^{[1
]}

Lee, Suk ^{[1
]}

机构：

[1] TSMC Design & Technol Platform, Taipei, Taiwan

来源：

2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) | 2013年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

3DIC technology presents a new system integration strategy for the electronics industry to achieve superior system performance with lower power consumption, higher bandwidth, smaller system form factor, and shorter time to market through heterogeneous integration. TSMC's "Chip-on-Wafer-on-Substrate (CoWoS)" technology opens up a new opportunity to bring 3D chip stacking vision from concept to reality. The provided methodology will be discussed about this market trend and the different pieces needed to jointly make it a success, which includes customers' required application, TSMC's support design flow, as well as the ecosystem design enablement of multi-die implementation, DFT solution, thermal analysis, verification and new categories of IPs.

引用

页码：394 / 398

页数：5

共 50 条

[21] 3Dblox: Unleash the Ultimate 3DIC Design Productivity
Chang, Jim
PROCEEDINGS OF THE 2024 INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN, ISPD 2024, 2024, : 215 - 215
[22] A Novel DFT Architecture for 3DIC Test, Diagnosis and Repair
Lee, Mincent
Adham, Saman
Wang, Min-Jer
Peng, Ching-Nen
Lin, Hung-Chih
Hsu, Sen-Kuei
Chen, Hao
2014 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), 2014,
[23] Reliability Challenges from 2.5D to 3DIC in Advanced Package Development
Lu, Ryan
Chuang, Yao-Chun
Wu, Jyun-Lin
He, Jun
2023 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, IRPS, 2023,
[24] 3DIC Stacking Process Investigation by Soldering Bonding Technology
Li, Jay
Chen, Wei Jhen
Lin, Joe
Chan, Mu Hsuan
Lo, Tank
Xu, Bruce
Hung, Liang Yih
Kao, Nicholas
Jiang, Don Son
Wang, Yu-Po
IEEE 72ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2022), 2022, : 1121 - 1125
[25] 3DIC Design Challenges, Early Solutions and Future Recommendations
Kolesov, Victoria
Rajan, Vivek
Nagisetty, Ramune
2021 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2021,
[26] Opportunities, Challenges and Mitigations in 3DIC Design, Test, and Analyses
Kamal, Pratyush
Mastroianni, Anthony
Rey, Juan
de la Serna, Antonio
2024 IEEE 67TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, MWSCAS 2024, 2024, : 867 - 869
[27] Cobalt UBM for fine pitch microbump applications in 3DIC
Derakhshandeh, Jaber
De Preter, Inge
Vandersmissen, Kevin
Dictus, Dries
Di Piazza, Luca
Hou, Lin
Guerrieri, Stefano
Vakanas, George
Armini, Silvia
Daily, Robert
Lesniewska, Alicja
Vandelaer, Yannick
Van de Peer, Myriam
Slabbekoorn, John
Rebibis, Kenneth June
Miller, Andy
Beyer, Gerald
Beyne, Eric
2015 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE AND 2015 IEEE MATERIALS FOR ADVANCED METALLIZATION CONFERENCE (IITC/MAM), 2015, : 221 - 223
[28] Thin Wafer Handling Process Evaluation for 3DIC Integration
Chang, H. H.
Tsai, W. L.
Chien, C. H.
Fu, H. C.
Chiang, C. W.
Chen, Y. H.
Lo, W. C.
2012 7TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT), 2012,
[29] Optimal lot sizing for 3DIC products in backend manufacturing
Lee, Hsuan
Chien, Chung Hsin
Wu, Hua Hsuan
Chen, Yun Chu
2013 E-MANUFACTURING & DESIGN COLLABORATION SYMPOSIUM (EMDC), 2013,
[30] SET Characterization in Logic Circuits Fabricated in a 3DIC Technology
Gouker, Pascale M.
Tyrrell, Brian
Renzi, Matthew
Chen, Chenson
Wyatt, Peter
Ahlbin, Jonathan R.
Weeden-Wright, Stephanie
Atkinson, Nick M.
Gaspard, Nelson J.
Bhuva, Bharat L.
Massengill, Lloyd W.
Zhang, Enxia
Schrimpf, R.
Weller, Robert A.
King, Michael P.
Gadlage, Matthew J.
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2011, 58 (06) : 2555 - 2562

← 1 2 3 4 5 →