Thermal Performance of CoolCube™ Monolithic and TSV-based 3D Integration Processes

被引:0
|
作者
Santos, C. [1 ,2 ]
Vivet, P. [1 ,2 ]
Thuries, S. [1 ,2 ]
Billoint, O. [1 ,2 ]
Colonna, J. -P. [1 ,2 ]
Coudrain, P. [3 ]
Wang, L. [4 ]
机构
[1] Univ Grenoble Alpes, F-38000 Grenoble, France
[2] CEA, LETI, MINATEC Campus, F-38054 Grenoble, France
[3] STMicroelectronics, 850 Rue Jean Monnet, F-38926 Crolles, France
[4] Calibre Design Solut, Mentor Graph, Fremont, CA 94538 USA
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
CoolCube (TM) is a monolithic 3D technology which has the potential to solve the interconnection density limitation of the existing TSV-based 3D integration processes. Since the active devices are fabricated on extremely thin die substrates, heat dissipation has been pointed as a potential showstopper issue for this emerging technology. This work provides a comparative study of the thermal performance of the CoolCube and TSV-based 3D integration processes for a range of technology parameters and application scenarios. Results show that CoolCube exhibits thermal performance similar to or even better than the TSV-based technologies thanks to its very tight die-to-die thermal coupling.
引用
收藏
页数:4
相关论文
共 50 条
  • [41] The thermal stress analysis in 3D IC integration with TSV interposer
    Pang, Junwen
    Wang, Jun
    2012 13TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP 2012), 2012, : 724 - 729
  • [42] Thermomechanical reliability of a Cu-TSV integration model based on 3D fabrication processes
    Sun, Yunna
    Lee, Seung-lo
    Liu, Yanmei
    Luo, Jiangbo
    Wang, Yan
    Ding, Guifu
    Wang, Hong
    Yao, Jingyuan
    PROCEEDINGS OF THE 2016 IEEE 18TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2016, : 704 - 708
  • [43] 3D monolithic integration
    Batude, P.
    Vinet, M.
    Pouydebasque, A.
    Le Royer, C.
    Previtali, B.
    Tabone, C.
    Hartmann, J. -M.
    Sanchez, L.
    Baud, L.
    Carron, V.
    Toffoli, A.
    Allain, F.
    Mazzocchi, V.
    Lafond, D.
    Deleonibus, S.
    Faynot, O.
    2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2011, : 2233 - 2236
  • [44] Front to backside alignment for TSV based 3D integration
    Windrich, Frank
    Schenke, Andreas
    2013 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC), 2013,
  • [45] Numerical Modeling of the Thermal Performance of 3D SiP with TSV
    Pan, Kailin
    Huang, Jing
    Liu, Jing
    Zhu, Weitao
    Ren, Guotao
    MANUFACTURING PROCESS TECHNOLOGY, PTS 1-5, 2011, 189-193 : 1610 - 1613
  • [46] Processor and DRAM Integration by TSV-Based 3-D Stacking for Power-Aware SOCs
    Chen, Shin-Shiun
    Hsu, Chun-Kai
    Shih, Hsiu-Chuan
    Yeh, Jen-Chieh
    Wu, Cheng-Wen
    2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2013, : 429 - 434
  • [47] Analytical Fault Tolerance Assessment and Metrics for TSV-Based 3D Network-on-Chip
    Eghbal, Ashkan
    Yaghini, Pooria M.
    Bagherzadeh, Nader
    Khayambashi, Misagh
    IEEE TRANSACTIONS ON COMPUTERS, 2015, 64 (12) : 3591 - 3604
  • [48] EMI Performance of Power Delivery Networks in 3D TSV Integration
    Araga, Yuuki
    Nagata, Makoto
    Miura, Noriyuki
    Ikeda, Hiroaki
    Kikuchi, Katsuya
    PROCEEDINGS OF THE 2016 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY - EMC EUROPE, 2016, : 428 - 433
  • [49] Novel Crack Sensor for TSV-based 3D Integrated Circuits: Design and Deployment Perspectives
    Zhang, Chun
    Jung, Moongon
    Lim, Sung Kyu
    Shi, Yiyu
    2013 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 2013, : 371 - 378
  • [50] TSV-Based 3-D ICs: Design Methods and Tools
    Lu, Tiantao
    Serafy, Caleb
    Yang, Zhiyuan
    Samal, Sandeep Kumar
    Lim, Sung Kyu
    Srivastava, Ankur
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2017, 36 (10) : 1593 - 1619