Efficient Statistical Simulation of Intersymbol Interference and Jitter in High-Speed Serial Interfaces

被引：11

作者：

Cristofoli, Andrea ^{[1
]}

Palestri, Pierpaolo ^{[1
]}

Da Dalt, Nicola ^{[2
]}

Selmi, Luca ^{[1
]}

机构：

[1] Univ Udine, Dept Elect Management & Mech Engn, I-33100 Udine, Italy

[2] Infineon Technol AG, A-9500 Villach, Austria

来源：

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | 2014年 / 4卷 / 03期

关键词：

High-speed serial links; intersymbol interference (ISI); jitter;

D O I：

10.1109/TCPMT.2013.2282530

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

We present and validate against experiments a modeling approach for high-speed serial links that combines the computational advantages of statistical techniques for inter-symbol interference (ISI) (improved by employing the realistic pulse shape as from SPICE simulations) and a simple empirical methodology to account for the jitter of the transmitter. The proposed approach is validated by comparison with other modeling approaches such as full SPICE simulations (for ISI) and Simulink (for jitter) as well as against the experimental data for a 2.5 Gb/s CMOS differential transmitter driving different channels.

引用

页码：480 / 489

页数：10

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