Threshold-Voltage Fluctuation of Double-Gated Poly-Si Nanowire Field-Effect Transistor

被引：12

作者：

Hsu, Hsing-Hui ^{[1
]}

Lin, Horng-Chih ^{[1
,2
]}

Chan, Leng

Huang, Tiao-Yuan

机构：

[1] Natl Chiao Tung Univ, Dept Elect Engn, Inst Elect, Hsinchu 300, Taiwan

[2] Natl Chiao Tung Univ, Natl Nano Device Labs, Hsinchu 300, Taiwan

来源：

IEEE ELECTRON DEVICE LETTERS | 2009年 / 30卷 / 03期

关键词：

Double gate; fluctuation; nanowire (NW); polycrystalline silicon (poly-Si); THIN-FILM-TRANSISTOR; MOSFETS; CHANNEL;

D O I：

10.1109/LED.2008.2011568

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this letter, the fluctuation characteristics of polycrystalline silicon (poly-Si) nanowire (NW) thin-film transistors (TFTs) with independently controlled double-gate configuration were studied. The defects existing in the NW channels are identified as one of the major sources for the fluctuation. The passivation of these defects by plasma treatment is shown to be effective for reducing the fluctuation. We have also found that the fluctuation is closely related to the operation modes. When only one of the gates is employed as the driving gate to control the switching behavior of the device, an optimum bias for the other gate can be found for minimizing the fluctuation.

引用

页码：243 / 245

页数：3

共 50 条

[31] Logic-In-Memory Characteristics of Reconfigurable Feedback Field-Effect Transistors with Double-Gated Structure
Shin, Yunwoo
Son, Jaemin
Jeon, Juhee
Cho, Kyoungah
Kim, Sangsig
ADVANCED ELECTRONIC MATERIALS, 2023, 9 (08)
[32] High-Performance Top-Gated and Double-Gated Oxide-Semiconductor Ferroelectric Field-Effect Transistor Enabled by Channel Defect Self-Compensation Effect
Chen, Chun-Kuei
Hooda, Sonu
Fang, Zihang
Lal, Manohar
Xu, Zefeng
Pan, Jieming
Tsai, Shih-Hao
Zamburg, Evgeny
Thean, Aaron Voon-Yew
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 70 (04) : 2098 - 2105
[33] Performance analysis of a Ge/Si core/shell nanowire field-effect transistor
Liang, Gengchiau
Xiang, Jie
Kharche, Neerav
Klimeck, Gerhard
Lieber, Charles M.
Lundstrom, Mark
NANO LETTERS, 2007, 7 (03) : 642 - 646
[34] Positive Bias Temperature Instabilities in Vertical Gate-all-around poly-Si Nanowire Field-effect Transistors
Yang, Wenjing
Li, Yuan
Wang, Bo
Qian, He
Chen, Jiezhi
PROCEEDINGS OF 2018 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUITS, TECHNOLOGIES AND APPLICATIONS (ICTA 2018), 2018, : 175 - 176
[35] A pH sensor with a double-gate silicon nanowire field-effect transistor
Ahn, Jae-Hyuk
Kim, Jee-Yeon
Seol, Myeong-Lok
Baek, David J.
Guo, Zheng
Kim, Chang-Hoon
Choi, Sung-Jin
Choi, Yang-Kyu
APPLIED PHYSICS LETTERS, 2013, 102 (08)
[36] Threshold-variation-enhanced adaptability of response in a nanowire field-effect transistor network
Kasai, Seiya
Miura, Kensuke
Shiratori, Yuta
APPLIED PHYSICS LETTERS, 2010, 96 (19)
[37] Tuning on threshold voltage of organic field-effect transistor with a copper oxide layer
Nie, Guozheng
Peng, Junbiao
Lan, Linfeng
Xu, Ruixia
Zou, Jianhua
Cao, Yong
ORGANIC ELECTRONICS, 2011, 12 (03) : 429 - 434
[38] Tuning the threshold voltage in electrolyte-gated organic field-effect transistors
Kergoat, Loig
Herlogsson, Lars
Piro, Benoit
Minh Chau Pham
Horowitz, Gilles
Crispin, Xavier
Berggren, Magnus
PROCEEDINGS OF THE NATIONAL ACADEMY OF SCIENCES OF THE UNITED STATES OF AMERICA, 2012, 109 (22) : 8394 - 8399
[39] Field-effect transistor based on ZnO nanorods with a variable threshold cutoff voltage
A. N. Gruzintsev
A. N. Redkin
C. Opoku
M. N. Shkunov
Semiconductors, 2013, 47 : 538 - 542
[40] DIRECT OBSERVATION OF DISLOCATION EFFECTS ON THRESHOLD VOLTAGE OF A GAAS FIELD-EFFECT TRANSISTOR
MIYAZAWA, S
ISHII, Y
ISHIDA, S
NANISHI, Y
APPLIED PHYSICS LETTERS, 1983, 43 (09) : 853 - 855

← 1 2 3 4 5 →