共 50 条
- [21] Design and Analysis of a Double RESURF 700V LIGBT with quasi-vertical DMOSFET in Junction Isolation Technology 2014 IEEE 26TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & IC'S (ISPSD), 2014, : 147 - 150
- [22] A 0.25 μm 700 V BCD Technology with Ultra-low Specific On-resistance SJ-LDMOS PROCEEDINGS OF THE 2020 32ND INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD 2020), 2020, : 419 - 422
- [23] A performance comparison between new reduced surface drain ''RSD'' LDMOS and RESURF and conventional planar power devices rated at 20V ISPSD '97: 1997 IEEE INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS, 1997, : 185 - 188
- [24] High Performance Pch-LDMOS Transistors in Wide Range Voltage from 35V to 200V SOI LDMOS Platform Technology 2011 IEEE 23RD INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD), 2011, : 44 - 47
- [25] Complementary 25V LDMOS for analog applications based on 0.6 μm BiCMOS technology PROCEEDINGS OF THE 2000 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 2000, : 94 - 97
- [26] Design of 700V LIGBT with the suppressed Substrate Current in a 0.5um Junction Isolated Technology 2012 24TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD), 2012, : 221 - 224
- [27] Suppression of Hot-Hole Injection in High-Voltage Triple RESURF LDMOS With Sandwich N-P-N Layer: Toward High-Performance and High-Reliability PROCEEDINGS OF THE 2020 32ND INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD 2020), 2020, : 415 - 418
- [28] 16-60V rated LDMOS show advanced performance in an 0.72μm evolution BiCMOS power technology INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST, 1997, : 367 - 370
- [29] Study on Single Event Burnout Effect for 18V LDMOS Based on 0.18μm Process Technology 2022 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS, 2022, : 588 - 591