A 20-Gb/s burst-mode clock and data recovery circuit using injection-locking technique

被引：53

作者：

Lee, Jri ^{[1
]}

Liu, Mingchung ^{[1
]}

机构：

[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10764, Taiwan

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2008年 / 43卷 / 03期

关键词：

burst mode; clock and data recovery (CDR); operational amplifier; phase-locked loop (PLL); injection-locked; voltage-controlled oscillator (VCO);

D O I：

10.1109/JSSC.2007.916598

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 20-Gb/s clock and data recovery circuit incorporates injection-locking technique to achieve high-speed operation with low power dissipation. The circuit creates spectral line at the frequency of data rate and injection-locks two cascaded LC oscillators. A frequency-monitoring mechanism is employed to ensure a close matching between the VCO natural frequency and data rate. Fabricated in 90-nm CMOS technology, this circuit achieves a bit, error rate of less than 10(-9) in both continuous (PRBS of 2(31) - 1) and burst modes while consuming 175 mW from a 1.5-V supply.

引用

页码：619 / 630

页数：12

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