A voltage-regulated static keeper technique for high-performance asics

被引：2
|
作者：
Kanno, H [1 ]
Saeki, T [1 ]
Abiko, H [1 ]
Kubo, A [1 ]
Tokashiki, K [1 ]
机构：
[1] NEC Corp Ltd, ULSI Device Dev Labs, Sagamihara, Kanagawa 2291198, Japan
来源：
ELEVENTH ANNUAL IEEE INTERNATIONAL ASIC CONFERENCE - PROCEEDINGS | 1998年
关键词：
D O I：
10.1109/ASIC.1998.723036
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A Voltage-Regulated Static Keeper (VRSK) technique is proposed. The VRSK can be applied to any dynamic circuit without size optimization and dissipates only one-third power of a static keeper. A 4-bit demultiplexer incorporating the VRSK can operate up to 2.0 GHz with a power consumption of only 5.8 mW.
引用
收藏
页码：361 / 364
页数：4
相关论文
共 50 条
  • [1] A contention-alleviated static keeper for high-performance domino logic circuits
    Shieh, SJ
    Wang, JS
    Yeh, YH
    [J]. ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS, 2001, : 707 - 710
  • [2] Design planning for high-performance ASICs
    [J]. IBM J Res Dev, 4 (431-452):
  • [3] Design planning for high-performance ASICs
    Sayah, JY
    Gupta, R
    Sherlekar, DD
    Honsinger, PS
    Apte, JM
    Bollinger, SW
    Chen, HH
    DasGupta, S
    Hsieh, EP
    Huber, AD
    Hughes, EJ
    Kurzum, ZM
    Rao, VB
    Tabtieng, T
    Valijan, V
    Yang, DY
    [J]. IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1996, 40 (04) : 431 - 452
  • [4] BUILDING A VERIFICATION SYSTEM FOR HIGH-PERFORMANCE ASICS
    GRAYDON, J
    [J]. VLSI SYSTEMS DESIGN, 1988, 9 (02): : 64 - 67
  • [5] HIGH-PERFORMANCE CLOCK DISTRIBUTION FOR CMOS ASICS
    BOON, S
    BUTLER, S
    BYRNE, R
    SETERING, B
    CASALANDA, M
    SCHERF, A
    [J]. PROCEEDINGS OF THE IEEE 1989 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1989, : 419 - 423
  • [6] UK FIRM FOCUSES ON HIGH-PERFORMANCE ASICS
    FLETCHER, P
    [J]. ELECTRONICS-US, 1994, 67 (23): : 6 - 6
  • [7] A high performance, scalable multiplexed keeper technique
    Kulkami, Jaydeep P.
    Roy, Kaushik
    [J]. ISQED 2007: PROCEEDINGS OF THE EIGHTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, 2007, : 545 - +
  • [8] At-speed structural test for high-performance ASICs
    Iyengar, Vikram
    Yokota, Toshihiko
    Yamada, Kazuhiro
    Anemikos, Theo
    Bassett, Bob
    Degregorio, Mike
    Farmer, Rudy
    Grise, Gary
    Johnson, Mark
    Milton, Dave
    Taylor, Mark
    Woytowich, Frank
    [J]. 2006 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2006, : 61 - +
  • [9] HIGH-PERFORMANCE VOLTAGE REGULATOR - NEW SIMPLE AND PRACTICAL TECHNIQUE
    MITCHELL, KW
    [J]. WIRELESS WORLD, 1976, 82 (1485): : 83 - 84
  • [10] PERFORMANCE INVESTIGATION OF A CURRENT-CONTROLLED VOLTAGE-REGULATED PWM RECTIFIER IN ROTATING AND STATIONARY FRAMES
    ZARGARI, NR
    JOOS, G
    [J]. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 1995, 42 (04) : 396 - 401
12345