A 1.2 V sense amplifier for high-performance embeddable NOR flash memories

被引：3

作者：

Baderna, D ^{[1
]}

Cabrini, A ^{[1
]}

De Sandre, G ^{[1
]}

De Santis, F ^{[1
]}

Pasotti, M ^{[1
]}

Rossini, A ^{[1
]}

Torelli, G ^{[1
]}

机构：

[1] Univ Pavia, Dept Elect, Pavia, Italy

来源：

2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | 2005年

关键词：

D O I：

10.1109/ISCAS.2005.1464825

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a sense amplifier scheme for low-voltage embeddable NOR Flash memory applications. The architecture of the proposed sense amplifier is based on a folded cascode configuration which allow the bit-line voltage to be regulated even in the case of a power supply of about 1.08 V. The proposed scheme was designed using low-leakage transistors for a 0.13-mu m Flash CMOS technology. Simulation showed a read time of 16 ns and 11 ns; for the worst-case and the best-case condition, respectively.

引用

页码：1266 / 1269

页数：4

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