Subthreshold SRAM: Challenges, Design Decisions and Solutions

被引：0
|
作者：
Patel, Harsh N. [1 ]
Yahya, Farah B. [1 ]
Calhoun, Benton H. [1 ]
机构：
[1] Univ Virginia, Dept Elect & Comp Engn, Charlottesville, VA 22903 USA
来源：
2017 IEEE 60TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS) | 2017年
基金：
美国国家科学基金会;
关键词：
body-biasing; margin; SRAM; Subthreshold; variation;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents an overview of various challenges, optimization strategies, and design requirements for subthreshold SRAM arrays targeting Ultra-Low Power (ULP) applications in the Internet of Things (IoTs). We study the impact of threshold voltage (VI) change due to process and temperature variations on various SRAM design decisions for ULP operation. We explore different solutions to enable reliable subthreshold operation ranging from technology to cell to architecture and assist. We also highlight the impact of process variations on optimal peripheral assist selection, and degree of assist requirements. We present trade-offs between reliabilty energy, and performance to an application-specific SRAM design. Six different types of SRAM bitcells arc compared for various subthreshold metrics to provide an optimal bitcell selection for the targeted application.
引用
收藏
页码：321 / 324
页数：4
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