Design of a Stable Read-Decoupled 6T SRAM Cell at 16-nm Technology Node

被引：6

作者：

Anand, Nitin ^{[1
]}

Sinha, Anubhav ^{[1
]}

Roy, Chandramauleshwar ^{[1
]}

Islam, Aminul ^{[1
]}

机构：

[1] Deemed Univ, Birla Inst Technol, Dept Elect & Commun Engn, Ranchi 835215, Jharkhand, India

来源：

2015 IEEE INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND COMMUNICATION TECHNOLOGY CICT 2015 | 2015年

关键词：

SRAM; read-decoupled; read SNM; write SNM;

D O I：

10.1109/CICT.2015.117

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This work presents a new single-port 6T SRAM cell with a single-ended read operation (read-decoupled) and shows significant improvement in read stability and write-ability as compared to the conventional 6T (CON6T) SRAM cell. Unlike the CON6T cell where the pull-up transistors are powered by the supply voltage (V-DD), the proposed cell has powered these transistors by the bitline driver. Another distinct feature of the proposed design is the presence of a PMOS transistor between the two storage nodes which is used during the write operation. The design metrics of proposed stable read-decoupled 6T SRAM cell are compared with those of the CON6T SRAM cell. The proposed cell shows 4x improvement in read static noise margin (RSNM) and 8% improvement in write static noise margin (WSNM) @ 700 mV.

引用

页码：524 / 528

页数：5

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