System-level design tools for RF communication ICs

The progress in VLSI technology allows the integration of complex heterogeneous systems on a chip. In order to boost the design productivity and guarantee the optimality of such systems while meeting the time to market constraints, a systematic top-down design approach has to be followed with sufficient time and attention paid to system-level architectural design before proceeding to the detailed block design. This paper presents a system exploration tool for telecom applications. This tool allow to analyze and compare alternative RF system architectures and provides quantitative data to support important design decisions and trade-offs such as analog-digital partitioning. This will be illustrated with several experimental results.