The SystemJ approach to system-level design

被引：13
|
作者：
Gruian, Flavius [1 ]
Roop, Partha [2 ]
Salcic, Zoran
Radojevic, Ivan [2 ]
机构：
[1] Lund Inst Technol, Dept Comp Sci, SE-22100 Lund, Sweden
[2] Univer Auckland, Dept Elect & Comp Engn, Auckland 92019, New Zealand
来源：
FOURTH ACM & IEEE INTERNATIONAL CONFERENCE ON FORMAL METHODS AND MODELS FOR CO-DESIGN, PROCEEDINGS | 2006年
关键词：
D O I：
10.1109/MEMCOD.2006.1695918
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, we propose a new system-level design language, called SystemJ. It extends Java with synchronous reactive features present in Esterel and asynchronous constructs suitable for modelling Globally Asynchronous Locally Synchronous systems. The strength of SystemJ comes from its ability to offer the data processing and encapsulation elegance of Java, Esterel-like reactivity and synchrony, and the asynchronous de-coupling of CSP all within the Java framework. Using standard Java environments, for specification and modelling, or specialised reactive embedded processors for high performance implementation, the SystemJ design flow is extremely versatile. With the increasing attention that Java gets in embedded systems, SystemJ comes to address data and control, software and hardware, modelling and implementation in a unified manner.
引用
收藏
页码：149 / +
页数：2
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