Verilog-A Compact Model for a Novel Cu/SiO2/W Quantum Memristor

被引：0

作者：

Nandakumar, S. R. ^{[1
]}

Rajendran, Bipin ^{[1
]}

机构：

[1] New Jersey Inst Technol, Dept Elect & Comp Engn, Newark, NJ 07102 USA

来源：

2016 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD) | 2016年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we develop a Verilog-A model for a memristive device that has shown non-volatile state transitions via half-integer quantized conductance states at room temperature and an on-off ratio of similar to 10(3). The model captures the geometrical evolution of a nano-filament and maps it to conductance levels in the equivalent electrical circuit, thereby accurately capturing the DC I-V and transient response of the device. The suitability of the model for circuit simulations is illustrated via a 4 x 4 crossbar array programming simulation in HSPICE which captures the multilevel programmability of the device.

引用

页码：169 / 172

页数：4

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