Design and analysis of 10-transistor full adders using novel XOR-XNOR gates

被引：0

作者：

Bui, HT ^{[1
]}

Al-Sheraidah, AK ^{[1
]}

Wang, YK ^{[1
]}

机构：

[1] Florida Atlantic Univ, Dept Comp Sci & Engn, Boca Raton, FL 33431 USA

来源：

2000 5TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING PROCEEDINGS, VOLS I-III | 2000年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Full adders are important elements in applications such as DSP architectures and microprocessors. In this paper, we propose a technique to build a total of 41 new 10-transistor full adders using novel XOR and XNOR gates in combination with existing ones. We have done over 10000 HSPICE simulation runs of all the different adders in different input patterns, frequencies, and load capacitances. Almost all those new adders consume less power in high frequencies, while three new adders consistently consume on average 10% less power and have higher speed compared with the previous 10-transistor full adder and the conventional 28-transistor CMOS adder.

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页码：619 / 622

页数：4