共 50 条
- [21] A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment Journal of Electronic Testing, 2008, 24 : 365 - 378
- [22] A new scan architecture for both low power testing and test volume compression under SOC test environment JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2008, 24 (04): : 365 - 378
- [25] Test Slice Difference Technique for Low-Transition Test Data Compression JOURNAL OF APPLIED SCIENCE AND ENGINEERING, 2012, 15 (02): : 157 - 166
- [28] Improving test quality using test data compression 14TH ASIAN TEST SYMPOSIUM, PROCEEDINGS, 2005, : 463 - 463
- [30] LOW POWER TEST 2008 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2008, : 1038 - 1038