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- [43] Study of Low Temperature and High Heat-Resistant Fluxless Bonding via Nanoscale Thin Film Control toward Wafer-Level Multiple Chip Stacking for 3D LSI 2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 14 - 19
- [44] Bumpless Build Cube (BBCube): High-Parallelism, High-Heat-Dissipation and Low-Power Stacked Memory Using Wafer-Level 3D Integration Process 2020 IEEE SYMPOSIUM ON VLSI TECHNOLOGY, 2020,
- [45] Study of Low Load and Temperature, High Heat-Resistant Solid-Phase Sn-Ag Bonding with Formation of Ag3Sn Intermetallic Compound Via Nanoscale Thin Film Control for Wafer-Level 3D-Stacking for 3D LSI 2013 IEEE 63RD ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2013, : 2381 - 2384
- [46] Study of the Radio Frequency (RF) performance of a Wafer-Level Package (WLP) with Through Silicon Vias (TSVs) for the integration of RF-MEMS and micromachined waveguides in the context of 5G and Internet of Things (IoT) applications: Part 1—validation of the 3D modelling approach Microsystem Technologies, 2020, 26 : 3799 - 3812
- [47] Study of the Radio Frequency (RF) performance of a Wafer-Level Package (WLP) with Through Silicon Vias (TSVs) for the integration of RF-MEMS and micromachined waveguides in the context of 5G and Internet of Things (IoT) applications. Part 2: parameterised 3D model and optimisation MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2021, 27 (01): : 223 - 234
- [48] Study of the Radio Frequency (RF) performance of a Wafer-Level Package (WLP) with Through Silicon Vias (TSVs) for the integration of RF-MEMS and micromachined waveguides in the context of 5G and Internet of Things (IoT) applications. Part 2: parameterised 3D model and optimisation Microsystem Technologies, 2021, 27 : 223 - 234
- [49] Study of the Radio Frequency (RF) performance of a Wafer-Level Package (WLP) with Through Silicon Vias (TSVs) for the integration of RF-MEMS and micromachined waveguides in the context of 5G and Internet of Things (IoT) applications: Part 1-validation of the 3D modelling approach MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2020, 26 (12): : 3799 - 3812