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- [21] A 69.5mW 20GS/s 6b Time-Interleaved ADC with Embedded Time-to-Digital Calibration in 32nm CMOS SOI 2014 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS (ISSCC), 2014, 57 : 380 - +
- [22] A Background Calibrated 28GS/s 8b Interleaved SAR ADC in 28nm CMOS 2017 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2017,
- [24] A 1.2V 30mW 8b 800MS/s time-interleaved ADC in 65nm CMOS 2008 IEEE SYMPOSIUM ON VLSI CIRCUITS, 2008, : 57 - 58
- [25] A 1.2V 30mW 8b 800MS/s time-interleaved ADC in 65nm CMOS 2008 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2008, : 72 - 73
- [26] A 6b 1.6GS/s ADC with Redundant Cycle 1-Tap Embedded DFE in 90nm CMOS 2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2012,
- [27] A 8-b 1GS/s 2b/cycle SAR ADC in 28-nm CMOS 2019 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2019), 2019, : 21 - 24
- [28] A 2GS/s 8b Flash ADC Based on Remainder Number System in 65nm CMOS 2017 SYMPOSIUM ON VLSI CIRCUITS, 2017, : C284 - C285
- [29] A 6b 1GS/s 2b/Cycle SAR ADC with Body-Voltage Offset Calibration 2020 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2020,
- [30] A 5GS/s 158.6mW 12b Passive-Sampling 8x-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOS 2019 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC), 2019, 62 : 62 - +