Soft error hardened latch and its estimation method

被引：6

作者：

Uemura, Taiki ^{[1
]}

Tanabe, Ryo ^{[1
]}

Tosaka, Yoshiharu ^{[1
]}

Satoh, Shigeo ^{[1
]}

机构：

[1] Fujitsu Labs Ltd, Tokyo 1970833, Japan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2008年 / 47卷 / 04期

关键词：

soft error; flip-flop; latch; radiation; neutron; alpha;

D O I：

10.1143/JJAP.47.2736

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

We propose soft error robust latches which have multi storage nodes and present their efficiencies. The key technology of the latch is a feedback loop circuit with a data node and four gates. We also discuss a method of soft error estimation in robust circuits in this paper. The soft error immunity of this feedback loop circuit is estimated by circuit simulations with two models. The soft error immunity of the latch is estimated by device simulation more accurately. By these precise simulations, the latch is proven to be highly tolerant to soft errors. In addition, the latch protects from not only retention data upset but also transient noise releasing. The latch provides high immunity against all soft error problems with a simple circuit. It is easy to apply the latch technique to various latches, such as single latches, scan latches, and flip-flops.

引用

页码：2736 / 2741

页数：6

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