Towards a firmware TPM on RISC-V

被引:0
|
作者
Boubakri, Marouene [1 ,2 ]
Chiatante, Fausto [1 ]
Zouari, Belhassen [2 ]
机构
[1] NXP, Syst Engn, Sophia Antipolis, France
[2] Univ Carthage, SupCom, Mediatron Lab, Tunis, Tunisia
关键词
RISC-V; Security; fTPM; Trusted Platform Module; Edge Processing; Edge Security; Processor; IoT Security; Automotive Security;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
To develop the next generation of Internet of Things, Edge devices and systems which leverage progress in enabling technologies such as 5G, distributed computing and artificial intelligence (AI), several requirements need to be developed and put in place to make the devices smarter. A major requirement for all the above applications is the long-term security and trust computing infrastructure. Trusted Computing requires the introduction inside of the platform of a Trusted Platform Module (TPM). Traditionally, a TPM was a discrete and dedicated module plugged into the platform to give TPM capabilities. Recently, processors manufacturers started integrating trusted computing features into their processors. A significant drawback of this approach is the need for a permanent modification of the processor microarchitecture. In this context, we suggest an analysis and a design of a software-only TPM for RISC-V processors based on seL4 microkernel and OP-TEE.
引用
收藏
页码:647 / 650
页数:4
相关论文
共 50 条
  • [32] A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs
    Gerlach, Lukas
    Weber, Daniel
    Zhang, Ruiyi
    Schwarz, Michael
    2023 IEEE SYMPOSIUM ON SECURITY AND PRIVACY, SP, 2023, : 2321 - 2338
  • [33] Towards Developing High Performance RISC-V Processors Using Agile Methodology
    Xu, Yinan
    Yu, Zihao
    Tang, Dan
    Chen, Guokai
    Chen, Lu
    Gou, Lingrui
    Jin, Yue
    Li, Qianruo
    Li, Xin
    Li, Zuojun
    Lin, Jiawei
    Liu, Tong
    Liu, Zhigang
    Tan, Jiazhan
    Wang, Huaqiang
    Wang, Huizhe
    Wang, Kaifan
    Zhang, Chuanqi
    Zhang, Fawang
    Zhang, Linjuan
    Zhang, Zifei
    Zhao, Yangyang
    Zhou, Yaoyang
    Zhou, Yike
    Zou, Jiangrui
    Cai, Ye
    Huan, Dandan
    Li, Zusong
    Zhao, Jiye
    Chen, Zihao
    He, Wei
    Quan, Qiyuan
    Liu, Xingwu
    Wang, Sa
    Shi, Kan
    Sun, Ninghui
    Bao, Yungang
    2022 55TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO), 2022, : 1178 - 1199
  • [34] Design of IOMMU Based on RISC-V
    Wang, Zhendao
    Ban, Guilong
    Hu, Jin
    Jiao, Xufeng
    Hunan Daxue Xuebao/Journal of Hunan University Natural Sciences, 2024, 51 (06): : 187 - 194
  • [35] RISC-V Extension for Lightweight Cryptography
    Tehrani, Etienne
    Graba, Tarik
    Merabet, Abdelmalek Si
    Danger, Jean-Luc
    2020 23RD EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2020), 2020, : 222 - 228
  • [36] Hardware Accelerated FrodoKEM on RISC-V
    Karl, Patrick
    Fritzmann, Tim
    Sigl, Georg
    2022 25TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS (DDECS), 2022, : 154 - 159
  • [37] A Compiler Comparison in the RISC-V Ecosystem
    Poorhosseini, Mehrdad
    Nebel, Wolfgang
    Gruettner, Kim
    2020 INTERNATIONAL CONFERENCE ON OMNI-LAYER INTELLIGENT SYSTEMS (IEEE COINS 2020), 2020, : 80 - 85
  • [38] A lightweight ISE for ChaCha on RISC-V
    Marshall, Ben
    Page, Daniel
    Thinh Hung Pham
    2021 IEEE 32ND INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 2021), 2021, : 25 - 32
  • [39] Execution at RISC: Stealth JOP Attacks on RISC-V Applications
    Buckwell, Loic
    Gilles, Olivier
    Perez, Daniel Gracia
    Kosmatov, Nikolai
    COMPUTER SECURITY. ESORICS 2023 INTERNATIONAL WORKSHOPS, CPS4CIP, PT II, 2024, 14399 : 377 - 391
  • [40] TaPaFuzz: Hardware-accelerated RISC-V bare-metal firmware fuzzing using rapid job launches
    Meisel, Florian
    Spang, Christoph
    Volz, David
    Koch, Andreas
    Journal of Systems Architecture, 2024, 156