A 0.6-V Low-Power Variable-Gain LNA in 0.18-μm CMOS Technology

被引：18

作者：

Hsieh, Jian-Yu ^{[1
]}

Lin, Kuei-Yu ^{[1
]}

机构：

[1] Natl Ilan Univ, Dept Elect Engn, Yilan 260, Taiwan

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2020年 / 67卷 / 01期

关键词：

LNA; CMOS; variable gain; high linearity; low power consumption; LOW-NOISE AMPLIFIER;

D O I：

10.1109/TCSII.2019.2902301

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 0.6-V low-power variable-gain low-noise amplifier by using 0.18-mu m CMOS process has been proposed. By using a tunable negative-feedback capacitor technology, variable gain can be achieved. Moreover, forward body biasing, input feedback capacitor, current-reuse and multiple-gate topologies are utilized for realizing low power consumption, small chip area, and high linearity. The measured results show the power gain and input third-order intercept point ranges from 4 dB to 10 dB and 0 dBm, respectively at 2.8 GHz. The power consumption is 0.6 mW.

引用

页码：23 / 26

页数：4

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