Analysis of Reliability Test Results for CMDS LSI and VLSI Circuits

被引：0

作者：

Petrukhin, B. P. ^{[1
]}

Shavykin, N. A. ^{[1
]}

机构：

[1] Russian Acad Sci, Trapeznikov Inst Control Sci, Moscow, Russia

来源：

AUTOMATION AND REMOTE CONTROL | 2011年 / 72卷 / 02期

关键词：

Cyclone; Failure Rate; Remote Control; Crystal Temperature; VLSI Circuit;

D O I：

10.1134/S0005117911020226

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

The reliability test results for CMDS LSI and VLSI circuits manufactured by Xilinx and Altera are analyzed. Upper estimates of failure rate with confidence probability P = 0.9 are obtained for all types of digital chips supplied by these companies.

引用

页码：449 / 455

页数：7

共 50 条

[31] Reordering Algorithm for Minimizing Test Power in VLSI Circuits
Paramasivam, K.
Gunavathi, K.
ENGINEERING LETTERS, 2007, 14 (01)
[32] TIMING ANALYSIS OF MOS VLSI CIRCUITS
WEI, YP
VLSI SYSTEMS DESIGN, 1987, 8 (09): : 52 - +
[33] Modelling of circuits and systems using PNs with applications to test generation for VLSI circuits
Kadim, HJ
2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2003, : 1155 - 1158
[34] INTERACTIVE SYSTEM ENABLES REMOTE USERS TO SPECIFY, DESIGN, AND VERIFY CUSTOM LSI, VLSI CIRCUITS
HUGHES, J
COMPUTER DESIGN, 1982, 21 (05): : 32 - &
[35] CRITICAL OPERATION MARGIN TEST FOR LSI RELIABILITY ASSESSMENT.
Mizusawa, Takeshi
Satoh, Hidekichi
Review of the Electrical Communication Laboratories (Tokyo), 1975, 23 (5-6): : 546 - 551
[36] Analysis and Reliability Test to Improve the Data Retention Performance of EPROM Circuits
Luan, Jiyuan
DiVita, Michael
PROCEEDINGS OF THE FOURTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2013), 2013, : 273 - 277
[37] Reliability- and process-variation aware design of VLSI circuits
Alam, M.
Kang, K.
Paul, B. C.
Roy, K.
IPFA 2007: PROCEEDINGS OF THE 14TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS, 2007, : 17 - +
[38] Analysis of the Test Results of the Reliability of Reed Switches.
Kosmowska, Alina
Zolnierczyk, Tadeusz
1600, (13):
[39] TEST-PATTERN GENERATION FOR VLSI CIRCUITS IN A PROLOG ENVIRONMENT
GUPTA, R
LECTURE NOTES IN COMPUTER SCIENCE, 1986, 225 : 528 - 535
[40] SOFTWARE INNOVATIONS HELP DESIGN AND TEST INTRICATE VLSI CIRCUITS
BURSKY, D
PATTON, C
ELECTRONIC DESIGN, 1985, 33 (11) : 59 - &

← 1 2 3 4 5 →