Assessment of through-silicon-vias with different configurations of ground vias and accounting for substrate losses

被引:1
|
作者
Rodriguez-Velasquez, Yojanes [1 ]
Murphy-Arteaga, Roberto S. [1 ]
Torres-Torres, Reydezel [1 ]
机构
[1] Inst Nacl Astrofis Opt & Electr, Elect Dept, Puebla 72840, Mexico
关键词
EM modelling; equivalent circuit; impedance; S-parameters; through-silicon via; COMPUTATIONAL ELECTROMAGNETICS CEM; SELECTIVE VALIDATION FSV; FINE-PITCH; NANOSCALE; MODEL; TSVS;
D O I
10.1002/mmce.22811
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
This article presents an S-parameter based equivalent circuit implementation for performing CAD-oriented RF simulations of through-silicon-vias (TSVs) in SPICE. In this regard, the accurate representation of TSVs in silicon dies exhibiting different conductivity and varying number of ground vias used as the return path is achieved. Moreover, it is demonstrated that the equivalent circuit can be cascaded to represent TSVs passing through several chips, provided that the transition bumps are included in the model. The proposal shows advantages over directly using tabular S-parameters, and substantially reduces the simulation time when compared with 3D electromagnetic solvers.
引用
收藏
页数:9
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