Fast design space exploration method for reconfigurable architectures

被引：0
|
作者：
Bossuet, L [1 ]
Gogniat, G [1 ]
Philippe, JL [1 ]
机构：
[1] Univ S Brittany, LESTER Lab, Lorient, France
来源：
ERSA'03: PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON ENGINEERING OF RECONFIGURABLE SYSTEMS AND ALGORITHMS | 2003年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper we propose an original and fast design space exploration method targeting reconfigurable architectures. This method takes place during the first steps of a design flow that works at the algorithmic level. It uses as input a high level specification of the application and is based on a functional model to describe the architectures to compare. This paper describes the projection step of the flow and presents an allocation heuristic that is based on communication costs reduction.
引用
收藏
页码：65 / 71
页数：7
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