FullReuse: A Novel ReRAM-based CNN Accelerator Reusing Data in Multiple Levels

被引:0
|
作者
Luo, Changhang [1 ]
Diao, Jietao [1 ]
Chen, Changlin [1 ]
机构
[1] Natl Univ Def Technol, Res Ctr Intelligent Devices Circuits & Syst, Changsha, Peoples R China
基金
中国国家自然科学基金;
关键词
ReRAM; convolutional neural networks; hardware accelerator; data reuse;
D O I
10.1109/icicm50929.2020.9292144
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The processing of Convolutional Neural Network (CNN) involves a large amount of data movements and thus usually causes significant latency and energy consumption. Resistive Random Access Memory (ReRAM) based CNN accelerators with Processing-In-Memory (PIM) architecture are deemed as a promising solution to improve the energy efficiency. However, the weight mapping methods and the corresponding dataflow in state of the art accelerators are not yet well designed to fully explore the possible data reuse in the CNN inference. In this paper, we propose a new ReRAM based PIM architecture named FullReuse in which all types of data reuse are realized with novel simple hardware circuit. The latency and energy consumption in the buffer and interconnect for data movements are minimized. Experiments with the VGG-network on the NeuroSim platform shows that the FullReuse can achieve up to 1.6 times improvement in the processing speed when compare with state of the art accelerators with comparable power efficiency and 14% area overhead.
引用
收藏
页码:177 / 183
页数:7
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